From patchwork Mon May 21 18:44:21 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andreas Schwab X-Patchwork-Id: 160417 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id DB68BB6FA0 for ; Tue, 22 May 2012 04:44:49 +1000 (EST) Comment: DKIM? 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Date: Mon, 21 May 2012 20:44:21 +0200 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.0.97 (gnu/linux) MIME-Version: 1.0 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org This implements clzsi2 for m68k. It also fixes a bug in the Coldfire expansion: ff1 (like bfffo) sets ccr from the source operand. Tested on m68k-linux and installed on trunk. Andreas. * config/m68k/m68k.md (*clzsi2_cf): Renamed from clzsi2. Call CC_STATUS_INIT. (clzsi2): New expander. (*clzsi2_68k): New insn. * config/m68k/m68k.h: Update comment about CLZ_DEFINED_VALUE_AT_ZERO. diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h index 0a390d0..b8d8d9c 100644 --- a/gcc/config/m68k/m68k.h +++ b/gcc/config/m68k/m68k.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GCC for Motorola 680x0/ColdFire. Copyright (C) 1987, 1988, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 + 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc. This file is part of GCC. @@ -698,7 +698,7 @@ __transfer_from_trampoline () \ #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 -/* The ColdFire FF1 instruction returns 32 for zero. */ +/* The 68020 BFFFO and ColdFire FF1 instructions return 32 for zero. */ #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1) #define STORE_FLAG_VALUE (-1) diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 8fc81b5..0225b7e 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -4467,12 +4467,33 @@ ;; bit indexing instructions +(define_expand "clzsi2" + [(set (match_operand:SI 0 "register_operand" "") + (clz:SI (match_operand:SI 1 "general_operand" "")))] + "ISA_HAS_FF1 || (TARGET_68020 && TARGET_BITFIELD)" +{ + if (ISA_HAS_FF1) + operands[1] = force_reg (SImode, operands[1]); +}) + +(define_insn "*clzsi2_68k" + [(set (match_operand:SI 0 "register_operand" "=d") + (clz:SI (match_operand:SI 1 "general_operand" "do")))] + "TARGET_68020 && TARGET_BITFIELD" +{ + CC_STATUS_INIT; + return "bfffo %1{#0:#0},%0"; +}) + ;; ColdFire ff1 instruction implements clz. -(define_insn "clzsi2" +(define_insn "*clzsi2_cf" [(set (match_operand:SI 0 "register_operand" "=d") (clz:SI (match_operand:SI 1 "register_operand" "0")))] "ISA_HAS_FF1" - "ff1 %0" +{ + CC_STATUS_INIT; + return "ff1 %0"; +} [(set_attr "type" "ext")]) ;; one complement instructions