From patchwork Fri May 18 09:57:02 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerry Huang X-Patchwork-Id: 160055 X-Patchwork-Delegate: afleming@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 16C58B6FCB for ; Fri, 18 May 2012 20:13:22 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E99792808F; Fri, 18 May 2012 12:13:19 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id T2JxFLyNMqA5; Fri, 18 May 2012 12:13:19 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C7C4A28081; Fri, 18 May 2012 12:13:17 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DA97628082 for ; Fri, 18 May 2012 12:13:09 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ZWQ31i-Zb3PX for ; Fri, 18 May 2012 12:13:09 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from db3outboundpool.messaging.microsoft.com (db3ehsobe006.messaging.microsoft.com [213.199.154.144]) by theia.denx.de (Postfix) with ESMTPS id 1075728081 for ; Fri, 18 May 2012 12:13:07 +0200 (CEST) Received: from mail65-db3-R.bigfish.com (10.3.81.233) by DB3EHSOBE001.bigfish.com (10.3.84.21) with Microsoft SMTP Server id 14.1.225.23; Fri, 18 May 2012 10:12:57 +0000 Received: from mail65-db3 (localhost [127.0.0.1]) by mail65-db3-R.bigfish.com (Postfix) with ESMTP id C606A1E05D9; Fri, 18 May 2012 10:12:57 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839he5bhf0ah) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail65-db3 (localhost.localdomain [127.0.0.1]) by mail65-db3 (MessageSwitch) id 1337335975458827_30890; Fri, 18 May 2012 10:12:55 +0000 (UTC) Received: from DB3EHSMHS012.bigfish.com (unknown [10.3.81.242]) by mail65-db3.bigfish.com (Postfix) with ESMTP id 6B3BB20062; Fri, 18 May 2012 10:12:55 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by DB3EHSMHS012.bigfish.com (10.3.87.112) with Microsoft SMTP Server (TLS) id 14.1.225.23; Fri, 18 May 2012 10:12:55 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.2.298.5; Fri, 18 May 2012 05:13:02 -0500 Received: from localhost (rock.ap.freescale.net [10.193.20.106]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id q4IAD0Xp024443; Fri, 18 May 2012 03:13:01 -0700 From: To: Date: Fri, 18 May 2012 17:57:02 +0800 Message-ID: <1337335022-18501-2-git-send-email-Chang-Ming.Huang@freescale.com> X-Mailer: git-send-email 1.6.4 In-Reply-To: <1337335022-18501-1-git-send-email-Chang-Ming.Huang@freescale.com> References: <1337335022-18501-1-git-send-email-Chang-Ming.Huang@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: Marek Vasut , Jerry Huang , Andy Fleming Subject: [U-Boot] [PATCH 2/2 v3] FSL/eSDHC: enable the clock to detect the SD card X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Jerry Huang For FSL low-end processors (VVN2.2), in order to detect the SD card, we should enable PEREN, HCKEN and IPGEN to enable the clock. Otherwise, after booting the u-boot, and then inserting the SD card, the SD card can't be detected. For SDHC VVN2.3 IP, these bits are reserved, and SDCLKEN is used. And when accessing to these reserved bit, no any impact happened. Signed-off-by: Jerry Huang CC: Andy Fleming CC: Marek Vasut --- changes for v2: - correct the typo changes for v3: - enable all clock bits for VVN2.3 and VVN2.2 - use funciton esdhc_setbits32 - tested on p1022ds, p1025rdb, p1020mbg-pc, mpc8536ds, p3041ds drivers/mmc/fsl_esdhc.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index a2f35e3..930a5c5 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -491,6 +491,9 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) /* First reset the eSDHC controller */ esdhc_reset(regs); + esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN + | SYSCTL_IPGEN | SYSCTL_CKEN); + mmc->priv = cfg; mmc->send_cmd = esdhc_send_cmd; mmc->set_ios = esdhc_set_ios;