Patchwork [RFC,V1,1/2] target-microblaze: impelemented swapx instructions

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Submitter Peter A. G. Crosthwaite
Date May 17, 2012, 5:37 a.m.
Message ID <c5218e1f2075107abacf86f226da845ae810361a.1337232850.git.peter.crosthwaite@petalogix.com>
Download mbox | patch
Permalink /patch/159812/
State New
Headers show

Comments

Peter A. G. Crosthwaite - May 17, 2012, 5:37 a.m.
Implemented the swapb and swaph byte/halfword reversal instructions added
to microblaze v8.30

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
---
 target-microblaze/translate.c |   12 +++++++++++-
 1 files changed, 11 insertions(+), 1 deletions(-)
Edgar Iglesias - May 18, 2012, 10:21 a.m.
On Thu, May 17, 2012 at 03:37:49PM +1000, Peter A. G. Crosthwaite wrote:
> Implemented the swapb and swaph byte/halfword reversal instructions added
> to microblaze v8.30
> 
> Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>

Applied, thanks Peter



> ---
>  target-microblaze/translate.c |   12 +++++++++++-
>  1 files changed, 11 insertions(+), 1 deletions(-)
> 
> diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
> index 742b395..a362938 100644
> --- a/target-microblaze/translate.c
> +++ b/target-microblaze/translate.c
> @@ -743,7 +743,7 @@ static void dec_bit(DisasContext *dc)
>      unsigned int op;
>      int mem_index = cpu_mmu_index(dc->env);
>  
> -    op = dc->ir & ((1 << 8) - 1);
> +    op = dc->ir & ((1 << 9) - 1);
>      switch (op) {
>          case 0x21:
>              /* src.  */
> @@ -825,6 +825,16 @@ static void dec_bit(DisasContext *dc)
>                  gen_helper_clz(cpu_R[dc->rd], cpu_R[dc->ra]);
>              }
>              break;
> +        case 0x1e0:
> +            /* swapb */
> +            LOG_DIS("swapb r%d r%d\n", dc->rd, dc->ra);
> +            tcg_gen_bswap32_i32(cpu_R[dc->rd], cpu_R[dc->ra]);
> +            break;
> +        case 0x1e1:
> +            /*swaph */
> +            LOG_DIS("swaph r%d r%d\n", dc->rd, dc->ra);
> +            tcg_gen_rotri_i32(cpu_R[dc->rd], cpu_R[dc->ra], 16);
> +            break;
>          default:
>              cpu_abort(dc->env, "unknown bit oc=%x op=%x rd=%d ra=%d rb=%d\n",
>                       dc->pc, op, dc->rd, dc->ra, dc->rb);
> -- 
> 1.7.3.2
>

Patch

diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 742b395..a362938 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -743,7 +743,7 @@  static void dec_bit(DisasContext *dc)
     unsigned int op;
     int mem_index = cpu_mmu_index(dc->env);
 
-    op = dc->ir & ((1 << 8) - 1);
+    op = dc->ir & ((1 << 9) - 1);
     switch (op) {
         case 0x21:
             /* src.  */
@@ -825,6 +825,16 @@  static void dec_bit(DisasContext *dc)
                 gen_helper_clz(cpu_R[dc->rd], cpu_R[dc->ra]);
             }
             break;
+        case 0x1e0:
+            /* swapb */
+            LOG_DIS("swapb r%d r%d\n", dc->rd, dc->ra);
+            tcg_gen_bswap32_i32(cpu_R[dc->rd], cpu_R[dc->ra]);
+            break;
+        case 0x1e1:
+            /*swaph */
+            LOG_DIS("swaph r%d r%d\n", dc->rd, dc->ra);
+            tcg_gen_rotri_i32(cpu_R[dc->rd], cpu_R[dc->ra], 16);
+            break;
         default:
             cpu_abort(dc->env, "unknown bit oc=%x op=%x rd=%d ra=%d rb=%d\n",
                      dc->pc, op, dc->rd, dc->ra, dc->rb);