From patchwork Tue May 15 14:10:59 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Valentin Longchamp X-Patchwork-Id: 159328 X-Patchwork-Delegate: prafulla@marvell.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 02DE2B6F9F for ; Wed, 16 May 2012 00:23:43 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DFBBA280B5; Tue, 15 May 2012 16:23:40 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2M9Xf+uoic-N; Tue, 15 May 2012 16:23:40 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 79002280B6; Tue, 15 May 2012 16:21:38 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8B8BE28093 for ; Tue, 15 May 2012 16:21:28 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id vvMWQAQOSs+k for ; Tue, 15 May 2012 16:21:28 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail.ch.keymile.com (mail.ch.keymile.com [193.17.201.103]) by theia.denx.de (Postfix) with SMTP id CB69A28098 for ; Tue, 15 May 2012 16:21:24 +0200 (CEST) Received: from SRVCHBER1212.ch.keymile.net ([172.31.32.9]) by eSafe SMTP Relay 1334159602; Tue, 15 May 2012 16:11:08 +0200 Received: from chber1-10533x.ch.keymile.net ([172.31.40.3]) by SRVCHBER1212.ch.keymile.net with Microsoft SMTPSVC(6.0.3790.4675); Tue, 15 May 2012 16:11:06 +0200 From: Valentin Longchamp To: To: prafulla@marvell.com, holger.brunck@keymile.com Date: Tue, 15 May 2012 16:10:59 +0200 Message-Id: <1337091064-30561-23-git-send-email-valentin.longchamp@keymile.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1337091064-30561-1-git-send-email-valentin.longchamp@keymile.com> References: <1337091064-30561-1-git-send-email-valentin.longchamp@keymile.com> X-OriginalArrivalTime: 15 May 2012 14:11:06.0999 (UTC) FILETIME=[920D6870:01CD32A4] X-ESAFE-STATUS: [srvchber1306.keymile.net] Mail allowed Cc: Valentin Longchamp , u-boot@lists.denx.de Subject: [U-Boot] [PATCH v4 22/27] arm/km: support the 2 PCIe fpga resets X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The PCIe FPGAs now have to support 2 resets: one for the non traffic affecting part (PCIe) and one for the traffic affecting part. When the FPGA is not reconfigured, we only reset the PCIe part. Signed-off-by: Valentin Longchamp --- board/keymile/km_arm/fpga_config.c | 13 +++++++++---- 1 files changed, 9 insertions(+), 4 deletions(-) diff --git a/board/keymile/km_arm/fpga_config.c b/board/keymile/km_arm/fpga_config.c index 8ac6393..fcc5fe6 100644 --- a/board/keymile/km_arm/fpga_config.c +++ b/board/keymile/km_arm/fpga_config.c @@ -99,7 +99,7 @@ static int boco_set_bits(u8 reg, u8 flags) #define FPGA_INIT_B 0x10 #define FPGA_DONE 0x20 -static int fpga_done() +static int fpga_done(void) { int ret = 0; u8 regval; @@ -206,25 +206,30 @@ int wait_for_fpga_config(void) } #define PRST1 0x4 -#define BRIDGE_RST 0x4 +#define PCIE_RST 0x10 +#define TRAFFIC_RST 0x04 int fpga_reset(void) { int ret = 0; + u8 resets; if (!check_boco2()) { /* we do not have BOCO2, this is not really used */ return 0; } - ret = boco_clear_bits(PRST1, BRIDGE_RST); + /* if we have skipped, we only want to reset the PCIe part */ + resets = skip ? PCIE_RST : PCIE_RST | TRAFFIC_RST; + + ret = boco_clear_bits(PRST1, resets); if (ret) return ret; /* small delay for the pulse */ udelay(10); - ret = boco_set_bits(PRST1, BRIDGE_RST); + ret = boco_set_bits(PRST1, resets); if (ret) return ret;