From patchwork Mon May 14 15:52:02 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeshwari Birje X-Patchwork-Id: 159043 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 748FAB7044 for ; Tue, 15 May 2012 01:49:27 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E6F092808F; Mon, 14 May 2012 17:49:24 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id LSO-GTUyZr8q; Mon, 14 May 2012 17:49:24 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1DB3828081; Mon, 14 May 2012 17:49:22 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A3FEF28086 for ; Mon, 14 May 2012 17:49:18 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id n-4gnspldODV for ; Mon, 14 May 2012 17:49:12 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailout4.samsung.com (mailout4.samsung.com [203.254.224.34]) by theia.denx.de (Postfix) with ESMTP id AF91728081 for ; Mon, 14 May 2012 17:49:11 +0200 (CEST) Received: from epcpsbgm2.samsung.com (mailout4.samsung.com [203.254.224.34]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M400052HRXUGXW0@mailout4.samsung.com> for u-boot@lists.denx.de; Tue, 15 May 2012 00:49:10 +0900 (KST) X-AuditID: cbfee61b-b7b94ae000002e44-78-4fb129764953 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (MMPCPMTA) with SMTP id B9.1A.11844.67921BF4; Tue, 15 May 2012 00:49:10 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M40002S8RXONL70@mmp1.samsung.com> for u-boot@lists.denx.de; Tue, 15 May 2012 00:49:10 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Date: Mon, 14 May 2012 21:22:02 +0530 Message-id: <1337010725-24807-3-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1337010725-24807-1-git-send-email-rajeshwari.s@samsung.com> References: <1337010725-24807-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: AAAAAA== X-TM-AS-MML: No Cc: marex@denx.de, k.chander@samsung.com, patches@linaro.org, gautam.vivek@samsung.com Subject: [U-Boot] [PATCH 3/6 V4] USB: EXYNOS: Set USB 2.0 HOST Link mode X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch adds a function to set usb host mode to USB 2.0 HOST Link for EXYNOS5 Signed-off-by: Rajeshwari Shinde --- arch/arm/cpu/armv7/exynos/system.c | 22 ++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/system.h | 3 +++ drivers/usb/host/ehci-exynos.c | 3 +++ 3 files changed, 28 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/system.c b/arch/arm/cpu/armv7/exynos/system.c index 6c34730..cc6ee03 100644 --- a/arch/arm/cpu/armv7/exynos/system.c +++ b/arch/arm/cpu/armv7/exynos/system.c @@ -25,6 +25,28 @@ #include #include +static void exynos5_set_usbhost_mode(unsigned int mode) +{ + struct exynos5_sysreg *sysreg = + (struct exynos5_sysreg *)samsung_get_base_sysreg(); + unsigned int phy_cfg; + + /* Setting USB20PHY_CONFIG register to USB 2.0 HOST link */ + if (mode == USB20_PHY_CFG_HOST_LINK_EN) { + setbits_le32(&sysreg->usb20phy_cfg, + USB20_PHY_CFG_HOST_LINK_EN); + } else { + clrbits_le32(&sysreg->usb20phy_cfg, + USB20_PHY_CFG_HOST_LINK_EN); + } +} + +void set_usbhost_mode(unsigned int mode) +{ + if (cpu_is_exynos5()) + exynos5_set_usbhost_mode(mode); +} + static void exynos4_set_system_display(void) { struct exynos4_sysreg *sysreg = diff --git a/arch/arm/include/asm/arch-exynos/system.h b/arch/arm/include/asm/arch-exynos/system.h index c1d880f..42e1d21 100644 --- a/arch/arm/include/asm/arch-exynos/system.h +++ b/arch/arm/include/asm/arch-exynos/system.h @@ -49,6 +49,9 @@ struct exynos5_sysreg { }; #endif +#define USB20_PHY_CFG_HOST_LINK_EN (1 << 0) + +void set_usbhost_mode(unsigned int mode); void set_system_display_ctrl(void); #endif /* _EXYNOS4_SYSTEM_H */ diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c index 3830c43..90d66d3 100644 --- a/drivers/usb/host/ehci-exynos.c +++ b/drivers/usb/host/ehci-exynos.c @@ -24,12 +24,15 @@ #include #include #include +#include #include "ehci.h" #include "ehci-core.h" /* Setup the EHCI host controller. */ static void setup_usb_phy(struct exynos_usb_phy *usb) { + set_usbhost_mode(USB20_PHY_CFG_HOST_LINK_EN); + clrbits_le32(&usb->usbphyctrl0, HOST_CTRL0_FSEL_MASK | HOST_CTRL0_COMMONON_N |