From patchwork Fri May 11 14:42:38 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 158540 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id EC5BEB7007 for ; Sat, 12 May 2012 01:29:47 +1000 (EST) Received: from localhost ([::1]:40759 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SSr4S-0005hd-Li for incoming@patchwork.ozlabs.org; Fri, 11 May 2012 10:43:52 -0400 Received: from eggs.gnu.org ([208.118.235.92]:42088) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SSr3j-0003to-Qw for qemu-devel@nongnu.org; Fri, 11 May 2012 10:43:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SSr3d-0003E4-QM for qemu-devel@nongnu.org; Fri, 11 May 2012 10:43:07 -0400 Received: from goliath.siemens.de ([192.35.17.28]:20999) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SSr3d-0003DU-HF for qemu-devel@nongnu.org; Fri, 11 May 2012 10:43:01 -0400 Received: from mail1.siemens.de (localhost [127.0.0.1]) by goliath.siemens.de (8.13.6/8.13.6) with ESMTP id q4BEgvDU012328; Fri, 11 May 2012 16:42:58 +0200 Received: from mchn199C.mchp.siemens.de ([139.22.114.193]) by mail1.siemens.de (8.13.6/8.13.6) with SMTP id q4BEgiv5026375; Fri, 11 May 2012 16:42:56 +0200 From: Jan Kiszka To: "Michael S. Tsirkin" Date: Fri, 11 May 2012 11:42:38 -0300 Message-Id: X-Mailer: git-send-email 1.7.3.4 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) X-Received-From: 192.35.17.28 Cc: Isaku Yamahata , Gerd Hoffmann , qemu-devel , Alexander Graf Subject: [Qemu-devel] [PATCH v3 5/8] msi: Invoke msi/msix_reset from PCI core X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org There is no point in pushing this burden to the devices, they may rather forget to call them (like intel-hda, ahci, xhci did). Instead, reset functions are now called from pci_device_reset and pci_bridge_reset. They do nothing if MSI/MSI-X is not in use. CC: Alexander Graf CC: Gerd Hoffmann CC: Isaku Yamahata Signed-off-by: Jan Kiszka --- hw/ide/ich.c | 1 - hw/intel-hda.c | 3 --- hw/ioh3420.c | 2 +- hw/pci.c | 5 +++++ hw/pci_bridge.c | 4 ++++ hw/virtio-pci.c | 1 - hw/xio3130_downstream.c | 2 +- hw/xio3130_upstream.c | 2 +- 8 files changed, 12 insertions(+), 8 deletions(-) diff --git a/hw/ide/ich.c b/hw/ide/ich.c index e7026bb..d3bc822 100644 --- a/hw/ide/ich.c +++ b/hw/ide/ich.c @@ -88,7 +88,6 @@ static void pci_ich9_reset(DeviceState *dev) { struct AHCIPCIState *d = DO_UPCAST(struct AHCIPCIState, card.qdev, dev); - msi_reset(&d->card); ahci_reset(&d->ahci); } diff --git a/hw/intel-hda.c b/hw/intel-hda.c index e38861e..bb11af2 100644 --- a/hw/intel-hda.c +++ b/hw/intel-hda.c @@ -1107,9 +1107,6 @@ static void intel_hda_reset(DeviceState *dev) DeviceState *qdev; HDACodecDevice *cdev; - if (d->msi) { - msi_reset(&d->pci); - } intel_hda_regs_reset(d); d->wall_base_ns = qemu_get_clock_ns(vm_clock); diff --git a/hw/ioh3420.c b/hw/ioh3420.c index 1632d31..d1499da 100644 --- a/hw/ioh3420.c +++ b/hw/ioh3420.c @@ -81,7 +81,7 @@ static void ioh3420_write_config(PCIDevice *d, static void ioh3420_reset(DeviceState *qdev) { PCIDevice *d = PCI_DEVICE(qdev); - msi_reset(d); + ioh3420_aer_vector_update(d); pcie_cap_root_reset(d); pcie_cap_deverr_reset(d); diff --git a/hw/pci.c b/hw/pci.c index b706e69..2148245 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -31,6 +31,8 @@ #include "loader.h" #include "range.h" #include "qmp-commands.h" +#include "msi.h" +#include "msix.h" //#define DEBUG_PCI #ifdef DEBUG_PCI @@ -188,6 +190,9 @@ void pci_device_reset(PCIDevice *dev) } } pci_update_mappings(dev); + + msi_reset(dev); + msix_reset(dev); } /* diff --git a/hw/pci_bridge.c b/hw/pci_bridge.c index 866f0b6..b533574 100644 --- a/hw/pci_bridge.c +++ b/hw/pci_bridge.c @@ -32,6 +32,8 @@ #include "pci_bridge.h" #include "pci_internals.h" #include "range.h" +#include "msi.h" +#include "msix.h" /* PCI bridge subsystem vendor ID helper functions */ #define PCI_SSVID_SIZEOF 8 @@ -296,6 +298,8 @@ void pci_bridge_reset(DeviceState *qdev) { PCIDevice *dev = PCI_DEVICE(qdev); pci_bridge_reset_reg(dev); + msi_reset(dev); + msix_reset(dev); } /* default qdev initialization function for PCI-to-PCI bridge */ diff --git a/hw/virtio-pci.c b/hw/virtio-pci.c index 4a4413d..3395a02 100644 --- a/hw/virtio-pci.c +++ b/hw/virtio-pci.c @@ -277,7 +277,6 @@ void virtio_pci_reset(DeviceState *d) VirtIOPCIProxy *proxy = container_of(d, VirtIOPCIProxy, pci_dev.qdev); virtio_pci_stop_ioeventfd(proxy); virtio_reset(proxy->vdev); - msix_reset(&proxy->pci_dev); proxy->flags &= ~VIRTIO_PCI_FLAG_BUS_MASTER_BUG; } diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c index 319624f..3716e45 100644 --- a/hw/xio3130_downstream.c +++ b/hw/xio3130_downstream.c @@ -48,7 +48,7 @@ static void xio3130_downstream_write_config(PCIDevice *d, uint32_t address, static void xio3130_downstream_reset(DeviceState *qdev) { PCIDevice *d = PCI_DEVICE(qdev); - msi_reset(d); + pcie_cap_deverr_reset(d); pcie_cap_slot_reset(d); pcie_cap_ari_reset(d); diff --git a/hw/xio3130_upstream.c b/hw/xio3130_upstream.c index 34a99bb..962d48e 100644 --- a/hw/xio3130_upstream.c +++ b/hw/xio3130_upstream.c @@ -47,7 +47,7 @@ static void xio3130_upstream_write_config(PCIDevice *d, uint32_t address, static void xio3130_upstream_reset(DeviceState *qdev) { PCIDevice *d = PCI_DEVICE(qdev); - msi_reset(d); + pci_bridge_reset(qdev); pcie_cap_deverr_reset(d); }