From patchwork Fri May 11 14:42:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 158529 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4ADC0B7003 for ; Sat, 12 May 2012 00:43:42 +1000 (EST) Received: from localhost ([::1]:38662 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SSr4G-0004ce-76 for incoming@patchwork.ozlabs.org; Fri, 11 May 2012 10:43:40 -0400 Received: from eggs.gnu.org ([208.118.235.92]:42122) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SSr3n-00043G-E4 for qemu-devel@nongnu.org; Fri, 11 May 2012 10:43:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SSr3f-0003EP-SF for qemu-devel@nongnu.org; Fri, 11 May 2012 10:43:10 -0400 Received: from thoth.sbs.de ([192.35.17.2]:29642) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SSr3f-0003EE-J2 for qemu-devel@nongnu.org; Fri, 11 May 2012 10:43:03 -0400 Received: from mail1.siemens.de (localhost [127.0.0.1]) by thoth.sbs.de (8.13.6/8.13.6) with ESMTP id q4BEh1hk030127; Fri, 11 May 2012 16:43:01 +0200 Received: from mchn199C.mchp.siemens.de ([139.22.114.193]) by mail1.siemens.de (8.13.6/8.13.6) with SMTP id q4BEgiv7026375; Fri, 11 May 2012 16:42:59 +0200 From: Jan Kiszka To: "Michael S. Tsirkin" Date: Fri, 11 May 2012 11:42:40 -0300 Message-Id: <09587bf040823d369c71a01359dac2cad85f30da.1336747349.git.jan.kiszka@siemens.com> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) X-Received-From: 192.35.17.2 Cc: Isaku Yamahata , Gerd Hoffmann , qemu-devel , Alexander Graf Subject: [Qemu-devel] [PATCH v3 7/8] msi: Invoke msi/msix_write_config from PCI core X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Also this functions is better invoked by the core than by each and every device. This allows to drop the config_write callbacks from ich and intel-hda. CC: Alexander Graf CC: Gerd Hoffmann CC: Isaku Yamahata Signed-off-by: Jan Kiszka --- hw/ide/ich.c | 8 -------- hw/intel-hda.c | 12 ------------ hw/ioh3420.c | 1 - hw/msi.c | 2 +- hw/pci.c | 3 +++ hw/virtio-pci.c | 2 -- hw/xio3130_downstream.c | 1 - hw/xio3130_upstream.c | 1 - 8 files changed, 4 insertions(+), 26 deletions(-) diff --git a/hw/ide/ich.c b/hw/ide/ich.c index d3bc822..e3eaaea 100644 --- a/hw/ide/ich.c +++ b/hw/ide/ich.c @@ -143,13 +143,6 @@ static int pci_ich9_uninit(PCIDevice *dev) return 0; } -static void pci_ich9_write_config(PCIDevice *pci, uint32_t addr, - uint32_t val, int len) -{ - pci_default_write_config(pci, addr, val, len); - msi_write_config(pci, addr, val, len); -} - static void ich_ahci_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -157,7 +150,6 @@ static void ich_ahci_class_init(ObjectClass *klass, void *data) k->init = pci_ich9_ahci_init; k->exit = pci_ich9_uninit; - k->config_write = pci_ich9_write_config; k->vendor_id = PCI_VENDOR_ID_INTEL; k->device_id = PCI_DEVICE_ID_INTEL_82801IR; k->revision = 0x02; diff --git a/hw/intel-hda.c b/hw/intel-hda.c index bb11af2..8f3b70b 100644 --- a/hw/intel-hda.c +++ b/hw/intel-hda.c @@ -1153,17 +1153,6 @@ static int intel_hda_exit(PCIDevice *pci) return 0; } -static void intel_hda_write_config(PCIDevice *pci, uint32_t addr, - uint32_t val, int len) -{ - IntelHDAState *d = DO_UPCAST(IntelHDAState, pci, pci); - - pci_default_write_config(pci, addr, val, len); - if (d->msi) { - msi_write_config(pci, addr, val, len); - } -} - static int intel_hda_post_load(void *opaque, int version) { IntelHDAState* d = opaque; @@ -1252,7 +1241,6 @@ static void intel_hda_class_init(ObjectClass *klass, void *data) k->init = intel_hda_init; k->exit = intel_hda_exit; - k->config_write = intel_hda_write_config; k->vendor_id = PCI_VENDOR_ID_INTEL; k->device_id = 0x2668; k->revision = 1; diff --git a/hw/ioh3420.c b/hw/ioh3420.c index d1499da..0a2601c 100644 --- a/hw/ioh3420.c +++ b/hw/ioh3420.c @@ -71,7 +71,6 @@ static void ioh3420_write_config(PCIDevice *d, pci_get_long(d->config + d->exp.aer_cap + PCI_ERR_ROOT_COMMAND); pci_bridge_write_config(d, address, val, len); - msi_write_config(d, address, val, len); ioh3420_aer_vector_update(d); pcie_cap_slot_write_config(d, address, val, len); pcie_aer_write_config(d, address, val, len); diff --git a/hw/msi.c b/hw/msi.c index da12f33..556c7c4 100644 --- a/hw/msi.c +++ b/hw/msi.c @@ -264,7 +264,7 @@ void msi_notify(PCIDevice *dev, unsigned int vector) stl_le_phys(address, data); } -/* call this function after updating configs by pci_default_write_config(). */ +/* Normally called by pci_default_write_config(). */ void msi_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, int len) { uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev)); diff --git a/hw/pci.c b/hw/pci.c index 2148245..439f3ce 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -1042,6 +1042,9 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) if (range_covers_byte(addr, l, PCI_COMMAND)) pci_update_irq_disabled(d, was_irq_disabled); + + msi_write_config(d, addr, val, l); + msix_write_config(d, addr, val, l); } /***********************************************************/ diff --git a/hw/virtio-pci.c b/hw/virtio-pci.c index 3395a02..985acfc 100644 --- a/hw/virtio-pci.c +++ b/hw/virtio-pci.c @@ -519,8 +519,6 @@ static void virtio_write_config(PCIDevice *pci_dev, uint32_t address, virtio_set_status(proxy->vdev, proxy->vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK); } - - msix_write_config(pci_dev, address, val, len); } static unsigned virtio_pci_get_features(void *opaque) diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c index 3716e45..56d1b35 100644 --- a/hw/xio3130_downstream.c +++ b/hw/xio3130_downstream.c @@ -41,7 +41,6 @@ static void xio3130_downstream_write_config(PCIDevice *d, uint32_t address, pci_bridge_write_config(d, address, val, len); pcie_cap_flr_write_config(d, address, val, len); pcie_cap_slot_write_config(d, address, val, len); - msi_write_config(d, address, val, len); pcie_aer_write_config(d, address, val, len); } diff --git a/hw/xio3130_upstream.c b/hw/xio3130_upstream.c index 962d48e..7972581 100644 --- a/hw/xio3130_upstream.c +++ b/hw/xio3130_upstream.c @@ -40,7 +40,6 @@ static void xio3130_upstream_write_config(PCIDevice *d, uint32_t address, { pci_bridge_write_config(d, address, val, len); pcie_cap_flr_write_config(d, address, val, len); - msi_write_config(d, address, val, len); pcie_aer_write_config(d, address, val, len); }