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PATCH: Add RTM support to -march=native

Message ID 20120511025156.GA14448@intel.com
State New
Headers show

Commit Message

H.J. Lu May 11, 2012, 2:51 a.m. UTC 
Hi,

This patch adds RTM support to -march=native.  Tested on Linux/x86-64.
OK for trunk?

Thanks.

H.J.
---
2012-05-10  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/driver-i386.c (host_detect_local_cpu): Support
	RTM.

Comments

Uros Bizjak May 11, 2012, 8:34 a.m. UTC | #1 
On Fri, May 11, 2012 at 4:51 AM, H.J. Lu <hongjiu.lu@intel.com> wrote:

> This patch adds RTM support to -march=native.  Tested on Linux/x86-64.
> OK for trunk?
>
> 2012-05-10  H.J. Lu  <hongjiu.lu@intel.com>
>
>        * config/i386/driver-i386.c (host_detect_local_cpu): Support
>        RTM.

OK.

Thanks,
Uros.
diff mbox

Patch

diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index 8fe7ab8..e93e8d9 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -397,7 +397,7 @@  const char *host_detect_local_cpu (int argc, const char **argv)
   unsigned int has_pclmul = 0, has_abm = 0, has_lwp = 0;
   unsigned int has_fma = 0, has_fma4 = 0, has_xop = 0;
   unsigned int has_bmi = 0, has_bmi2 = 0, has_tbm = 0, has_lzcnt = 0;
-  unsigned int has_hle = 0;
+  unsigned int has_hle = 0, has_rtm = 0;
 
   bool arch;
 
@@ -458,6 +458,7 @@  const char *host_detect_local_cpu (int argc, const char **argv)
 
       has_bmi = ebx & bit_BMI;
       has_hle = ebx & bit_HLE;
+      has_rtm = ebx & bit_RTM;
       has_avx2 = ebx & bit_AVX2;
       has_bmi2 = ebx & bit_BMI2;
     }
@@ -731,10 +732,11 @@  const char *host_detect_local_cpu (int argc, const char **argv)
       const char *sse4_1 = has_sse4_1 ? " -msse4.1" : " -mno-sse4.1";
       const char *lzcnt = has_lzcnt ? " -mlzcnt" : " -mno-lzcnt";
       const char *hle = has_hle ? " -mhle" : " -mno-hle";
+      const char *rtm = has_rtm ? " -mrtm" : " -mno-rtm";
 
       options = concat (options, cx16, sahf, movbe, ase, pclmul,
 			popcnt, abm, lwp, fma, fma4, xop, bmi, bmi2,
-			tbm, avx, avx2, sse4_2, sse4_1, lzcnt,
+			tbm, avx, avx2, sse4_2, sse4_1, lzcnt, rtm,
 			hle, NULL);
     }