Patchwork [U-Boot,6/9] tegra: enable SPL build for seaboard

login
register
mail settings
Submitter Allen Martin
Date May 10, 2012, 7:02 a.m.
Message ID <1336633347-8049-7-git-send-email-amartin@nvidia.com>
Download mbox | patch
Permalink /patch/158204/
State Superseded
Headers show

Comments

Allen Martin - May 10, 2012, 7:02 a.m.
Signed-off-by: Allen Martin <amartin@nvidia.com>
---
 boards.cfg                      |    2 +-
 include/configs/seaboard.h      |    9 +++++++++
 include/configs/tegra2-common.h |   19 +++++++++++++++++++
 3 files changed, 29 insertions(+), 1 deletion(-)
Stephen Warren - May 15, 2012, 5:06 a.m.
On 05/10/2012 01:02 AM, Allen Martin wrote:
> Signed-off-by: Allen Martin <amartin@nvidia.com>

> diff --git a/boards.cfg b/boards.cfg

> -seaboard                     arm         armv7       seaboard            nvidia         tegra2
> +seaboard                     arm         armv7:arm720t seaboard          nvidia         tegra2

Hmmm. We'll have to duplicate this change for all boards. Is there some
way to do set up the SPL CPU for all Tegra boards so we don't have to do
that?

> diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h

> +#ifndef CONFIG_SPL_BUILD

And every Tegra board's config header will have to ifdef a bunch of
stuff out for SPL.

Perhaps we can just create a new tegra_spl board for the SPL rather than
having an SPL variant for each board. Still, I don't know how we'd
represent the UART differences if we did that though.
Allen Martin - May 18, 2012, 10:24 p.m.
On Mon, May 14, 2012 at 10:06:40PM -0700, Stephen Warren wrote:
> On 05/10/2012 01:02 AM, Allen Martin wrote:
> > Signed-off-by: Allen Martin <amartin@nvidia.com>
> 
> > diff --git a/boards.cfg b/boards.cfg
> 
> > -seaboard                     arm         armv7       seaboard            nvidia         tegra2
> > +seaboard                     arm         armv7:arm720t seaboard          nvidia         tegra2
> 
> Hmmm. We'll have to duplicate this change for all boards. Is there some
> way to do set up the SPL CPU for all Tegra boards so we don't have to do
> that?

I would have to think what that would look like.  The boards.cfg file
has one entry per board and doesn't really have any place to store
information on groups of boards or any type of per vendor or per
architecture settings.  This decision on the CPU needs to be made at
mkconfig time or else I wouldn't have touched boards.cfg format at all
and stuck it in some tegra specific config file or Makefile.  I can't
see any way to do what you're asking without making the change even
more invasive.

> > diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
> 
> > +#ifndef CONFIG_SPL_BUILD
> 
> And every Tegra board's config header will have to ifdef a bunch of
> stuff out for SPL.

I'll take a pass at trying to pull some of that out into a common
header. 


> Perhaps we can just create a new tegra_spl board for the SPL rather than
> having an SPL variant for each board. Still, I don't know how we'd
> represent the UART differences if we did that though.

I tossed out that idea as part of the discussion about using a
separate toolchain for the SPL, but Wolfgang shot it down:

http://lists.denx.de/pipermail/u-boot/2012-April/122248.html

-Allen
Stephen Warren - May 22, 2012, 5:07 p.m.
On 05/18/2012 04:24 PM, Allen Martin wrote:
> On Mon, May 14, 2012 at 10:06:40PM -0700, Stephen Warren wrote:
>> On 05/10/2012 01:02 AM, Allen Martin wrote:
...
>> Perhaps we can just create a new tegra_spl board for the SPL rather than
>> having an SPL variant for each board. Still, I don't know how we'd
>> represent the UART differences if we did that though.
> 
> I tossed out that idea as part of the discussion about using a
> separate toolchain for the SPL, but Wolfgang shot it down:
> 
> http://lists.denx.de/pipermail/u-boot/2012-April/122248.html

Is that the right link? That message seems to be talking about a
CROSS_COMPILE_SPL variable rather than having a separate boards.cfg
entry for a Tegra SPL.
Allen Martin - May 22, 2012, 7:02 p.m.
On Tue, May 22, 2012 at 10:07:37AM -0700, Stephen Warren wrote:
> On 05/18/2012 04:24 PM, Allen Martin wrote:
> > On Mon, May 14, 2012 at 10:06:40PM -0700, Stephen Warren wrote:
> >> On 05/10/2012 01:02 AM, Allen Martin wrote:
> ...
> >> Perhaps we can just create a new tegra_spl board for the SPL rather than
> >> having an SPL variant for each board. Still, I don't know how we'd
> >> represent the UART differences if we did that though.
> > 
> > I tossed out that idea as part of the discussion about using a
> > separate toolchain for the SPL, but Wolfgang shot it down:
> > 
> > http://lists.denx.de/pipermail/u-boot/2012-April/122248.html
> 
> Is that the right link? That message seems to be talking about a
> CROSS_COMPILE_SPL variable rather than having a separate boards.cfg
> entry for a Tegra SPL.

This was the piece I was referring to, which was a conversation about
exactly this topic (armv4 SPL and armv7 u-boot):

> > The architecture seems harder to fix.  It seems like I really have to
> > have two entries in boards.cfg, which means two passes of config/make.
>
> This should be not needed; I also do not think this would be an
> acceptable approach.

-Allen

Patch

diff --git a/boards.cfg b/boards.cfg
index 4436053..30ceddc 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -230,7 +230,7 @@  smdk5250		     arm	 armv7	     smdk5250		 samsung	exynos
 smdkv310		     arm	 armv7	     smdkv310		 samsung	exynos
 trats                        arm         armv7       trats               samsung        exynos
 harmony                      arm         armv7       harmony             nvidia         tegra2
-seaboard                     arm         armv7       seaboard            nvidia         tegra2
+seaboard                     arm         armv7:arm720t seaboard          nvidia         tegra2
 ventana                      arm         armv7       ventana             nvidia         tegra2
 u8500_href                   arm         armv7       u8500               st-ericsson    u8500
 actux1_4_16                  arm         ixp         actux1              -              -           actux1:FLASH2X2
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
index ae075e7..8e3eee8 100644
--- a/include/configs/seaboard.h
+++ b/include/configs/seaboard.h
@@ -27,10 +27,12 @@ 
 #include <asm/sizes.h>
 #include "tegra2-common.h"
 
+#ifndef CONFIG_SPL_BUILD
 /* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */
 #define CONFIG_DEFAULT_DEVICE_TREE	tegra2-seaboard
 #define CONFIG_OF_CONTROL
 #define CONFIG_OF_SEPARATE
+#endif
 
 /* High-level configuration options */
 #define TEGRA2_SYSMEM		"mem=384M@0M nvmem=128M@384M mem=512M@512M"
@@ -38,7 +40,9 @@ 
 #define CONFIG_TEGRA2_BOARD_STRING	"NVIDIA Seaboard"
 
 /* Board-specific serial config */
+#ifndef CONFIG_SPL_BUILD
 #define CONFIG_SERIAL_MULTI
+#endif
 #define CONFIG_TEGRA2_ENABLE_UARTD
 #define CONFIG_SYS_NS16550_COM1		NV_PA_APB_UARTD_BASE
 
@@ -59,6 +63,7 @@ 
 #define CONFIG_CMD_SF
 #define CONFIG_SPI_FLASH_SIZE		(4 << 20)
 
+#ifndef CONFIG_SPL_BUILD
 /* I2C */
 #define CONFIG_TEGRA_I2C
 #define CONFIG_SYS_I2C_INIT_BOARD
@@ -78,6 +83,8 @@ 
 #define CONFIG_CMD_EXT2
 #define CONFIG_CMD_FAT
 
+#endif
+
 /* Environment in SPI */
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_SPI_MAX_HZ		48000000
@@ -86,10 +93,12 @@ 
 #define CONFIG_ENV_SECT_SIZE    CONFIG_ENV_SIZE
 #define CONFIG_ENV_OFFSET       (CONFIG_SPI_FLASH_SIZE - CONFIG_ENV_SECT_SIZE)
 
+#ifndef CONFIG_SPL_BUILD
 /* USB Host support */
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_TEGRA
 #define CONFIG_USB_STORAGE
 #define CONFIG_CMD_USB
+#endif
 
 #endif /* __CONFIG_H */
diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h
index 837f859..997887a 100644
--- a/include/configs/tegra2-common.h
+++ b/include/configs/tegra2-common.h
@@ -90,9 +90,11 @@ 
  * parameter, the default (2) causes occasional Data Buffer Errors in OUT
  * packets depending on the buffer address and size.
  */
+#ifndef CONFIG_SPL_BUILD
 #define CONFIG_USB_EHCI_TXFIFO_THRESH	10
 #define CONFIG_EHCI_IS_TDI
 #define CONFIG_EHCI_DCACHE
+#endif
 
 /* Total I2C ports on Tegra2 */
 #define TEGRA_I2C_NUM_CONTROLLERS	4
@@ -175,4 +177,21 @@ 
 
 #define CONFIG_TEGRA2_GPIO
 #define CONFIG_CMD_GPIO
+
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_NAND_SIMPLE
+#define CONFIG_SPL_TEXT_BASE		0x00008000
+#define CONFIG_SPL_MAX_SIZE		0x00078000
+#define CONFIG_SYS_SPL_MALLOC_START	0x00080000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x00010000
+#define CONFIG_SPL_STACK		0x0009fffc
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/tegra2/u-boot-spl.lds"
+
 #endif /* __TEGRA2_COMMON_H */