From patchwork Thu May 10 00:13:53 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 158094 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4DA96B6F13 for ; Thu, 10 May 2012 11:21:12 +1000 (EST) Received: from localhost ([::1]:44936 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SSH3C-0002ZC-Nz for incoming@patchwork.ozlabs.org; Wed, 09 May 2012 20:16:10 -0400 Received: from eggs.gnu.org ([208.118.235.92]:50096) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SSH2B-0000cc-Lp for qemu-devel@nongnu.org; Wed, 09 May 2012 20:15:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SSH29-0005Qa-PU for qemu-devel@nongnu.org; Wed, 09 May 2012 20:15:07 -0400 Received: from cantor2.suse.de ([195.135.220.15]:35544 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SSH29-0005MM-Dk; Wed, 09 May 2012 20:15:05 -0400 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id DD383978B8; Thu, 10 May 2012 02:15:03 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Thu, 10 May 2012 02:13:53 +0200 Message-Id: <1336608892-30501-16-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.7 In-Reply-To: <1336608892-30501-1-git-send-email-afaerber@suse.de> References: <1336608892-30501-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: "open list:PowerPC" , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Alexander Graf Subject: [Qemu-devel] [PATCH next v2 15/74] target-ppc: Let cpu_ppc_init() return PowerPCCPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Adapt e500 mpc8544ds machine accordingly. Turn cpu_init() into a static inline function returning CPUPPCState for backwards compatibility. Signed-off-by: Andreas Färber --- hw/ppce500_mpc8544ds.c | 7 +++++-- target-ppc/cpu.h | 12 ++++++++++-- target-ppc/helper.c | 4 ++-- 3 files changed, 17 insertions(+), 6 deletions(-) diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c index f1dfbe1..88a2767 100644 --- a/hw/ppce500_mpc8544ds.c +++ b/hw/ppce500_mpc8544ds.c @@ -254,12 +254,15 @@ static void mpc8544ds_init(ram_addr_t ram_size, irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *)); irqs[0] = g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB); for (i = 0; i < smp_cpus; i++) { + PowerPCCPU *cpu; qemu_irq *input; - env = cpu_ppc_init(cpu_model); - if (!env) { + + cpu = cpu_ppc_init(cpu_model); + if (cpu == NULL) { fprintf(stderr, "Unable to initialize CPU!\n"); exit(1); } + env = &cpu->env; if (!firstenv) { firstenv = env; diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 84c9674..77a2858 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1099,7 +1099,7 @@ struct mmu_ctx_t { #include "cpu-qom.h" /*****************************************************************************/ -CPUPPCState *cpu_ppc_init (const char *cpu_model); +PowerPCCPU *cpu_ppc_init(const char *cpu_model); void ppc_translate_init(void); int cpu_ppc_exec (CPUPPCState *s); /* you can call this signal handler from your SIGBUS and SIGSEGV @@ -1214,7 +1214,15 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn) int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp); int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val); -#define cpu_init cpu_ppc_init +static inline CPUPPCState *cpu_init(const char *cpu_model) +{ + PowerPCCPU *cpu = cpu_ppc_init(cpu_model); + if (cpu == NULL) { + return NULL; + } + return &cpu->env; +} + #define cpu_exec cpu_ppc_exec #define cpu_gen_code cpu_ppc_gen_code #define cpu_signal_handler cpu_ppc_signal_handler diff --git a/target-ppc/helper.c b/target-ppc/helper.c index e97e496..42f66e8 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -3191,7 +3191,7 @@ void cpu_state_reset(CPUPPCState *env) cpu_reset(ENV_GET_CPU(env)); } -CPUPPCState *cpu_ppc_init (const char *cpu_model) +PowerPCCPU *cpu_ppc_init(const char *cpu_model) { PowerPCCPU *cpu; CPUPPCState *env; @@ -3213,5 +3213,5 @@ CPUPPCState *cpu_ppc_init (const char *cpu_model) qemu_init_vcpu(env); - return env; + return cpu; }