From patchwork Tue May 8 15:08:19 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: target-arm: When setting FPSCR.QC, don't clear other FPSCR bits From: Peter Maydell X-Patchwork-Id: 157716 Message-Id: <1336489699-10969-2-git-send-email-peter.maydell@linaro.org> To: Blue Swirl Cc: qemu-devel@nongnu.org, Anthony Liguori , Paul Brook Date: Tue, 8 May 2012 16:08:19 +0100 From: Matt Craighead This patch fixes a bug affecting a variety of Neon instructions, such as VQADD. Signed-off-by: Matt Craighead Signed-off-by: Peter Maydell --- target-arm/neon_helper.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c index 1e02d61..e0b9dbf 100644 --- a/target-arm/neon_helper.c +++ b/target-arm/neon_helper.c @@ -16,7 +16,7 @@ #define SIGNBIT (uint32_t)0x80000000 #define SIGNBIT64 ((uint64_t)1 << 63) -#define SET_QC() env->vfp.xregs[ARM_VFP_FPSCR] = CPSR_Q +#define SET_QC() env->vfp.xregs[ARM_VFP_FPSCR] |= CPSR_Q #define NEON_TYPE1(name, type) \ typedef struct \