From patchwork Tue May 8 13:46:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 157687 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 16A03B6F62 for ; Tue, 8 May 2012 23:49:05 +1000 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SRkke-0005uF-3W; Tue, 08 May 2012 13:46:52 +0000 Received: from mail-pb0-f49.google.com ([209.85.160.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1SRkkb-0005tm-27 for linux-arm-kernel@lists.infradead.org; Tue, 08 May 2012 13:46:49 +0000 Received: by pbbrq13 with SMTP id rq13so8639873pbb.36 for ; Tue, 08 May 2012 06:46:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=INcH0NlssHYMwgw7y343AfnnBNHWBQgCigiPvCjHLtk=; b=SV1xiNZIjgPwvTKlfhSXd2rpcF6X7WvB+cSFtKP69cLVSBtw6hLMNiO2PCM+2vH/u7 4ZXh2mbMJNb9og5nb378gDQWhQJvROH4X4XEf+27/XL+8wV/VhpqhjASxJF58LxfBaaY URQsFnZoSooDtfYfAJ0zD66dpMlw+/ctFbUVMXiVJtA4rci6mLbN7CwvmJ/IBwRKNsKb iwDadA5y90aQhBTYohhbBExONQjJpeJrECyhGUvo30Vex70K7gnndKVgkYz9fRdERpNg LmJwQhXfJaxuc52JYuwQVIfBOL7tyExcTW66nA/fq7OPNFCLyypIpqn+wXZXfHvVJooR MWow== Received: by 10.68.194.230 with SMTP id hz6mr4677493pbc.128.1336484807091; Tue, 08 May 2012 06:46:47 -0700 (PDT) Received: from localhost.localdomain ([114.216.144.99]) by mx.google.com with ESMTPS id ui2sm2463592pbc.8.2012.05.08.06.46.41 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 08 May 2012 06:46:45 -0700 (PDT) From: Shawn Guo To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] ARM: imx6q: register phy fixup only when CONFIG_PHYLIB is enabled Date: Tue, 8 May 2012 21:46:25 +0800 Message-Id: <1336484785-8881-1-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1336478520.23308.36.camel@sauron.fi.intel.com> References: <1336478520.23308.36.camel@sauron.fi.intel.com> X-Gm-Message-State: ALoCoQnhnidTIf3Kppe0Cmz444VFWRXgnu2nK+SL9SbgpSnY65LqrjX73LTyAafm2nggfHmL25ev X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Shawn Guo , Richard Zhao , Artem Bityutskiy X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org It fixes the following compile error with network disabled in imx_v6_v7_defconfig. arch/arm/mach-imx/built-in.o: In function `ksz9021rn_phy_fixup': imx53-dt.c:(.text+0x5f70): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5f84): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5f98): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5fac): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5fc0): undefined reference to `mdiobus_write' arch/arm/mach-imx/built-in.o: In function `imx6q_init_machine': imx53-dt.c:(.init.text+0x387c): undefined reference to `phy_register_fixup_for_uid' make: *** [.tmp_vmlinux1] Error 1 Reported-by: Artem Bityutskiy Signed-off-by: Shawn Guo --- arch/arm/mach-imx/mach-imx6q.c | 19 +++++++++++-------- 1 files changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index d25c5d8..2047d7d 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -63,21 +63,24 @@ soft: /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */ static int ksz9021rn_phy_fixup(struct phy_device *phydev) { - /* min rx data delay */ - phy_write(phydev, 0x0b, 0x8105); - phy_write(phydev, 0x0c, 0x0000); + if (IS_ENABLED(CONFIG_PHYLIB)) { + /* min rx data delay */ + phy_write(phydev, 0x0b, 0x8105); + phy_write(phydev, 0x0c, 0x0000); - /* max rx/tx clock delay, min rx/tx control delay */ - phy_write(phydev, 0x0b, 0x8104); - phy_write(phydev, 0x0c, 0xf0f0); - phy_write(phydev, 0x0b, 0x104); + /* max rx/tx clock delay, min rx/tx control delay */ + phy_write(phydev, 0x0b, 0x8104); + phy_write(phydev, 0x0c, 0xf0f0); + phy_write(phydev, 0x0b, 0x104); + } return 0; } static void __init imx6q_sabrelite_init(void) { - phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, + if (IS_ENABLED(CONFIG_PHYLIB)) + phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, ksz9021rn_phy_fixup); }