Patchwork [12/16] KVM: PPC: bookehv: Fix r8/r13 storing in level exception handler

login
register
mail settings
Submitter Alexander Graf
Date May 6, 2012, 2:20 p.m.
Message ID <1336314060-32640-13-git-send-email-agraf@suse.de>
Download mbox | patch
Permalink /patch/157067/
State New
Headers show

Comments

Alexander Graf - May 6, 2012, 2:20 p.m.
From: Mihai Caraman <mihai.caraman@freescale.com>

Guest r8 register is held in the scratch register and stored correctly,
so remove the instruction that clobbers it. Guest r13 was missing from vcpu,
store it there.

Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
---
 arch/powerpc/kvm/bookehv_interrupts.S |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

Patch

diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S
index 06750cc..6048a00 100644
--- a/arch/powerpc/kvm/bookehv_interrupts.S
+++ b/arch/powerpc/kvm/bookehv_interrupts.S
@@ -252,10 +252,10 @@  _GLOBAL(kvmppc_handler_\intno\()_\srr1)
 	mfspr	r6, \srr1
 	PPC_LL	r4, GPR11(r8)
 	PPC_STL	r7, VCPU_GPR(r7)(r11)
-	PPC_STL	r8, VCPU_GPR(r8)(r11)
 	PPC_STL r3, VCPU_GPR(r10)(r11)
 	mfctr	r7
 	PPC_STL	r12, VCPU_GPR(r12)(r11)
+	PPC_STL r13, VCPU_GPR(r13)(r11)
 	PPC_STL	r4, VCPU_GPR(r11)(r11)
 	PPC_STL	r7, VCPU_CTR(r11)
 	mr	r4, r11