@@ -464,7 +464,7 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum,
#define cpu_signal_handler cpu_arm_signal_handler
#define cpu_list arm_cpu_list
-#define CPU_SAVE_VERSION 6
+#define CPU_SAVE_VERSION 7
/* MMU modes definitions */
#define MMU_MODE0_SUFFIX _kernel
@@ -64,7 +64,7 @@ void cpu_save(QEMUFile *f, void *opaque)
qemu_put_be32(f, env->features);
if (arm_feature(env, ARM_FEATURE_VFP)) {
- for (i = 0; i < 16; i++) {
+ for (i = 0; i < 32; i++) {
CPU_DoubleU u;
u.d = env->vfp.regs[i];
qemu_put_be32(f, u.l.upper);
@@ -77,15 +77,6 @@ void cpu_save(QEMUFile *f, void *opaque)
/* TODO: Should use proper FPSCR access functions. */
qemu_put_be32(f, env->vfp.vec_len);
qemu_put_be32(f, env->vfp.vec_stride);
-
- if (arm_feature(env, ARM_FEATURE_VFP3)) {
- for (i = 16; i < 32; i++) {
- CPU_DoubleU u;
- u.d = env->vfp.regs[i];
- qemu_put_be32(f, u.l.upper);
- qemu_put_be32(f, u.l.lower);
- }
- }
}
if (arm_feature(env, ARM_FEATURE_IWMMXT)) {
@@ -182,7 +173,7 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id)
env->features = qemu_get_be32(f);
if (arm_feature(env, ARM_FEATURE_VFP)) {
- for (i = 0; i < 16; i++) {
+ for (i = 0; i < 32; i++) {
CPU_DoubleU u;
u.l.upper = qemu_get_be32(f);
u.l.lower = qemu_get_be32(f);
@@ -195,15 +186,6 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id)
/* TODO: Should use proper FPSCR access functions. */
env->vfp.vec_len = qemu_get_be32(f);
env->vfp.vec_stride = qemu_get_be32(f);
-
- if (arm_feature(env, ARM_FEATURE_VFP3)) {
- for (i = 16; i < 32; i++) {
- CPU_DoubleU u;
- u.l.upper = qemu_get_be32(f);
- u.l.lower = qemu_get_be32(f);
- env->vfp.regs[i] = u.d;
- }
- }
}
if (arm_feature(env, ARM_FEATURE_IWMMXT)) {
This way, we fix a bug (we were overwritten the 16 first registers on load), and we don't need to check for ARM_FEATURE_VPF3, we always send the 32 registers. Signed-off-by: Juan Quintela <quintela@redhat.com> --- target-arm/cpu.h | 2 +- target-arm/machine.c | 22 ++-------------------- 2 files changed, 3 insertions(+), 21 deletions(-)