From patchwork Fri May 4 11:32:50 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 156874 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 9407FB6FC5 for ; Fri, 4 May 2012 21:33:18 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 95022280A0; Fri, 4 May 2012 13:33:16 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id PJVLbWt6J01h; Fri, 4 May 2012 13:33:16 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 22C1B28095; Fri, 4 May 2012 13:33:15 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8366528095 for ; Fri, 4 May 2012 13:33:12 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id omG8apVkXUe5 for ; Fri, 4 May 2012 13:33:12 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) by theia.denx.de (Postfix) with ESMTPS id 123C928091 for ; Fri, 4 May 2012 13:33:10 +0200 (CEST) Received: from frontend1.mail.m-online.net (frontend1.mail.intern.m-online.net [192.168.8.180]) by mail-out.m-online.net (Postfix) with ESMTP id 3VkWLZ0xhJz3hhfC; Fri, 4 May 2012 13:33:10 +0200 (CEST) Received: from localhost (dynscan1.mnet-online.de [192.168.8.164]) by mail.m-online.net (Postfix) with ESMTP id 3VkWLZ0RWqz4KK2f; Fri, 4 May 2012 13:33:10 +0200 (CEST) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from smtp-auth.mnet-online.de ([192.168.8.180]) by localhost (dynscan1.mail.m-online.net [192.168.8.164]) (amavisd-new, port 10024) with ESMTP id aQD8xmLE+mZs; Fri, 4 May 2012 13:33:09 +0200 (CEST) Received: from mashiro.lan (unknown [195.140.253.167]) by smtp-auth.mnet-online.de (Postfix) with ESMTPA; Fri, 4 May 2012 13:32:56 +0200 (CEST) From: Marek Vasut To: u-boot@lists.denx.de Date: Fri, 4 May 2012 13:32:50 +0200 Message-Id: <1336131170-7621-1-git-send-email-marex@denx.de> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1336060041-8803-3-git-send-email-marex@denx.de> References: <1336060041-8803-3-git-send-email-marex@denx.de> Cc: Marek Vasut Subject: [U-Boot] [PATCH] i.MX28: Add delay after CPU bypass is cleared X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This solves issues when larger amount of DRAM is used, like 256MB. Behave the same in case of CPU bypass as we do in case of EMI bypass, but wait 15 ms. We need to wait until the clock domain stabilizes. This issue seemed to have been caused by not waiting after frobbing with the CPU bypass, it was unrelated to memory, but had a direct impact, causing trouble. This was yet another X-File of the imx-bootlets, sigh. The conclusion is, trying a semi-random delay (there is delay after the EMI bypass change), the issue is fixed. Another possible explanation is that we do not do the "simple memory test" FSL does in their imx-bootlets (1000 R/W cycles to/from piece of the memory, while also outputing something on the serial port). This might have caused the similar delay in the imx-bootlets and therefore they didn't need to add this explicitly. For now, this seems good fix enough, but to me, whole that memory init code in imx-bootlets is completely flunked and it'd need deeper investigation. Signed-off-by: Marek Vasut Cc: Wolfgang Denk Cc: Detlev Zundel Cc: Stefano Babic Cc: Fabio Estevam Acked-by: Stefano Babic Acked-by: Detlev Zundel --- arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 2 ++ 1 file changed, 2 insertions(+) V2: Change the description, this issue seemed to have been caused by not waiting after frobbing with the CPU bypass, it was unrelated to memory, but had a direct impact, causing trouble. This was yet another X-File of the imx-bootlets, sigh. V3: Add more conspiracy theories into the commit message. diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c index 0d13537..9fa5d29 100644 --- a/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c @@ -149,6 +149,8 @@ void mx28_mem_setup_cpu_and_hbus(void) /* Disable CPU bypass */ writel(CLKCTRL_CLKSEQ_BYPASS_CPU, &clkctrl_regs->hw_clkctrl_clkseq_clr); + + early_delay(15000); } void mx28_mem_setup_vdda(void)