From patchwork Mon Apr 30 17:14:34 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 155926 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id DB9D4B6F9D for ; Tue, 1 May 2012 03:14:53 +1000 (EST) Comment: DKIM? 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See http://antispam.yahoo.com/domainkeys DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=gcc.gnu.org; h=Received:Received:X-SWARE-Spam-Status:X-Spam-Check-By:Received:Received:MIME-Version:Received:Received:In-Reply-To:References:Date:Message-ID:Subject:From:To:Cc:Content-Type:Mailing-List:Precedence:List-Id:List-Unsubscribe:List-Archive:List-Post:List-Help:Sender:Delivered-To; b=v1kR1ouBo3/Fco7GMS+k7r8Wj03QYpL3PaJNsqw7Zgl75vfPvEH+EmD/4r522A 67UHipR4vFiKT0dXRfiilFX4b/YYli5Kqn2m4o7uTvJjfuVYZ7LrbJAUfPb6Qf68 RiHwe24m/LoktDaPIzGks8iPvP5MofMVHDQ2GetQV8jUQ=; Received: (qmail 1600 invoked by alias); 30 Apr 2012 17:14:49 -0000 Received: (qmail 1591 invoked by uid 22791); 30 Apr 2012 17:14:48 -0000 X-SWARE-Spam-Status: No, hits=-4.9 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, KHOP_RCVD_TRUST, KHOP_THREADED, RCVD_IN_DNSWL_LOW, RCVD_IN_HOSTKARMA_YE, TW_ZJ X-Spam-Check-By: sourceware.org Received: from mail-yw0-f47.google.com (HELO mail-yw0-f47.google.com) (209.85.213.47) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 30 Apr 2012 17:14:35 +0000 Received: by yhjj56 with SMTP id j56so1609727yhj.20 for ; Mon, 30 Apr 2012 10:14:34 -0700 (PDT) MIME-Version: 1.0 Received: by 10.236.37.202 with SMTP id y50mr23128371yha.63.1335806074382; Mon, 30 Apr 2012 10:14:34 -0700 (PDT) Received: by 10.146.124.5 with HTTP; Mon, 30 Apr 2012 10:14:34 -0700 (PDT) In-Reply-To: <20120430131009.GK16117@tyan-ft48-01.lab.bos.redhat.com> References: <20120425191453.GX16117@tyan-ft48-01.lab.bos.redhat.com> <20120426152814.GB16117@tyan-ft48-01.lab.bos.redhat.com> <20120430131009.GK16117@tyan-ft48-01.lab.bos.redhat.com> Date: Mon, 30 Apr 2012 19:14:34 +0200 Message-ID: Subject: Re: [PATCH] Improve andq $0xffffffff, %reg handling (PR target/53110) From: Uros Bizjak To: Jakub Jelinek Cc: Richard Henderson , gcc-patches@gcc.gnu.org Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org On Mon, Apr 30, 2012 at 3:10 PM, Jakub Jelinek wrote: > On Mon, Apr 30, 2012 at 02:54:05PM +0200, Uros Bizjak wrote: >> > My recent changes to zero_extend expanders should handle this >> > automatically, and will undo generation of zero_extend pattern. Please >> > see zero_extendsi2_and expander, and how it handles >> > TARGET_ZERO_EXTEND_WITH_AND targets. >> >> Attached patch implements this idea. In addition, it fixes the >> splitter to not change output mode of zero_extension from HImode and >> QImode from DImode to SImode. Although they generate the same >> instruction, I think we should better keep original mode here. > > Thanks.  I was trying this morning slightly different patch for the same, > but strangely it failed bootstrap, and didn't get around to analysing > why a mem store had (zero_extend (subreg (reg))) on a RHS. > >> +  operands[1] = gen_lowpart (mode, operands[1]); >> + >> +  if (GET_MODE (operands[0]) == DImode) >> +    insn = (mode == SImode) >> +        ? gen_zero_extendsidi2 >> +        : (mode == HImode) >> +        ? gen_zero_extendhidi2 >> +        : gen_zero_extendqidi2; >> +  else if (GET_MODE (operands[0]) == SImode) >> +    insn = (mode == HImode) >> +        ? gen_zero_extendhisi2 >> +        : gen_zero_extendqisi2; >> +  else if (GET_MODE (operands[0]) == HImode) >> +    insn = gen_zero_extendqihi2; >>    else >> -    ix86_expand_binary_operator (AND, mode, operands); >> +    gcc_unreachable (); >> + >> +  emit_insn (insn (operands[0], operands[1])); > > IMHO you should use mode instead of GET_MODE (operands[0]) > in all of the above, then the compiler can actually optimize > it at compile time. 2012-04-30 Uros Bizjak * config/i386/i386.md (and3): Change runtime operand mode checks to compile-time "mode == mode" checks. (and splitter): Ditto. Tested on x86_64-pc-linux-gnu, committed to mainline SVN. Uros. Index: config/i386/i386.md =================================================================== --- config/i386/i386.md (revision 186992) +++ config/i386/i386.md (working copy) @@ -7695,7 +7695,7 @@ (match_operand:SWIM 2 "")))] "" { - enum machine_mode mode = GET_MODE (operands[1]); + enum machine_mode mode = mode; rtx (*insn) (rtx, rtx); if (CONST_INT_P (operands[2]) && REG_P (operands[0])) @@ -7710,30 +7710,28 @@ mode = QImode; } - if (mode == GET_MODE (operands[1])) + if (mode == mode) { ix86_expand_binary_operator (AND, mode, operands); DONE; } - operands[1] = gen_lowpart (mode, operands[1]); - - if (GET_MODE (operands[0]) == DImode) + if (mode == DImode) insn = (mode == SImode) ? gen_zero_extendsidi2 : (mode == HImode) ? gen_zero_extendhidi2 : gen_zero_extendqidi2; - else if (GET_MODE (operands[0]) == SImode) + else if (mode == SImode) insn = (mode == HImode) ? gen_zero_extendhisi2 : gen_zero_extendqisi2; - else if (GET_MODE (operands[0]) == HImode) + else if (mode == HImode) insn = gen_zero_extendqihi2; else gcc_unreachable (); - emit_insn (insn (operands[0], operands[1])); + emit_insn (insn (operands[0], gen_lowpart (mode, operands[1]))); DONE; }) @@ -7884,9 +7882,7 @@ mode = QImode; } - operands[1] = gen_lowpart (mode, operands[1]); - - if (GET_MODE (operands[0]) == DImode) + if (mode == DImode) insn = (mode == SImode) ? gen_zero_extendsidi2 : (mode == HImode) @@ -7894,14 +7890,15 @@ : gen_zero_extendqidi2; else { - /* Zero extend to SImode to avoid partial register stalls. */ - operands[0] = gen_lowpart (SImode, operands[0]); + if (mode != SImode) + /* Zero extend to SImode to avoid partial register stalls. */ + operands[0] = gen_lowpart (SImode, operands[0]); insn = (mode == HImode) ? gen_zero_extendhisi2 : gen_zero_extendqisi2; } - emit_insn (insn (operands[0], operands[1])); + emit_insn (insn (operands[0], gen_lowpart (mode, operands[1]))); DONE; })