| Message ID | 1335708915-20338-1-git-send-email-js_at_ng@scharsoft.de |
|---|---|
| State | Accepted, archived |
| Delegated to: | Andreas Bießmann |
| Headers | show |
Dear Andreas Bießmann, Please could you apply this open patch. I've just tested this against the current atmel and master tree. It works. best regards Jens Scharsig > * fix chip select initialization for frame buffer, this will be > increase frame buffer access speed > > Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> > --- > board/BuS/eb_cpux9k2/cpux9k2.c | 6 +++--- > 1 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/board/BuS/eb_cpux9k2/cpux9k2.c b/board/BuS/eb_cpux9k2/cpux9k2.c > index 54f9b64..15a31be 100644 > --- a/board/BuS/eb_cpux9k2/cpux9k2.c > +++ b/board/BuS/eb_cpux9k2/cpux9k2.c > @@ -269,9 +269,9 @@ int drv_video_init(void) > display_height = 256; > printf("%ld x %ld pixel matrix\n", display_width, display_height); > > - /* RWH = 7 | RWS =7 | TDF = 15 | NWS = 0x7F */ > - csr = AT91_SMC_CSR_RWHOLD(7) | AT91_SMC_CSR_RWSETUP(7) | > - AT91_SMC_CSR_TDF(15) | AT91_SMC_CSR_NWS(127) | > + /* RWH = 2 | RWS =2 | TDF = 4 | NWS = 0x6 */ > + csr = AT91_SMC_CSR_RWHOLD(2) | AT91_SMC_CSR_RWSETUP(2) | > + AT91_SMC_CSR_TDF(4) | AT91_SMC_CSR_NWS(6) | > AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_16 | > AT91_SMC_CSR_BAT_16 | AT91_SMC_CSR_WSEN; > writel(csr, &mc->smc.csr[2]); >
Dear Jens Scharsig, On 29.04.12 16:15, Jens Scharsig wrote: > * fix chip select initialization for frame buffer, this will be > increase frame buffer access speed > > Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> > --- applied to u-boot-atmel/master, thanks! Best regards Andreas Bießmann
diff --git a/board/BuS/eb_cpux9k2/cpux9k2.c b/board/BuS/eb_cpux9k2/cpux9k2.c index 54f9b64..15a31be 100644 --- a/board/BuS/eb_cpux9k2/cpux9k2.c +++ b/board/BuS/eb_cpux9k2/cpux9k2.c @@ -269,9 +269,9 @@ int drv_video_init(void) display_height = 256; printf("%ld x %ld pixel matrix\n", display_width, display_height); - /* RWH = 7 | RWS =7 | TDF = 15 | NWS = 0x7F */ - csr = AT91_SMC_CSR_RWHOLD(7) | AT91_SMC_CSR_RWSETUP(7) | - AT91_SMC_CSR_TDF(15) | AT91_SMC_CSR_NWS(127) | + /* RWH = 2 | RWS =2 | TDF = 4 | NWS = 0x6 */ + csr = AT91_SMC_CSR_RWHOLD(2) | AT91_SMC_CSR_RWSETUP(2) | + AT91_SMC_CSR_TDF(4) | AT91_SMC_CSR_NWS(6) | AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_16 | AT91_SMC_CSR_BAT_16 | AT91_SMC_CSR_WSEN; writel(csr, &mc->smc.csr[2]);
* fix chip select initialization for frame buffer, this will be increase frame buffer access speed Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> --- board/BuS/eb_cpux9k2/cpux9k2.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-)