From patchwork Wed Apr 25 14:23:32 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 154951 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 336E8B6EEB for ; Thu, 26 Apr 2012 00:24:26 +1000 (EST) Received: from localhost ([::1]:42958 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SN38q-0006zi-29 for incoming@patchwork.ozlabs.org; Wed, 25 Apr 2012 10:24:24 -0400 Received: from eggs.gnu.org ([208.118.235.92]:55448) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SN38N-0006YY-K3 for qemu-devel@nongnu.org; Wed, 25 Apr 2012 10:24:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SN38H-0004Gh-En for qemu-devel@nongnu.org; Wed, 25 Apr 2012 10:23:55 -0400 Received: from cantor2.suse.de ([195.135.220.15]:59924 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SN38H-0004G5-4z for qemu-devel@nongnu.org; Wed, 25 Apr 2012 10:23:49 -0400 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 014A090983; Wed, 25 Apr 2012 16:23:48 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Wed, 25 Apr 2012 16:23:32 +0200 Message-Id: <1335363821-26219-5-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.7 In-Reply-To: <1335363821-26219-1-git-send-email-afaerber@suse.de> References: <1335363821-26219-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: Blue Swirl , Aurelien Jarno , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Anthony Liguori Subject: [Qemu-devel] [PATCH 04/12] target-sh4: QOM'ify CPU reset X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Move code from cpu_state_reset() to QOM superh_cpu_reset(). Signed-off-by: Andreas Färber Reviewed-by: Peter Maydell --- target-sh4/cpu.c | 21 ++++++++++++++++++++- target-sh4/translate.c | 22 ++-------------------- 2 files changed, 22 insertions(+), 21 deletions(-) diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c index e110f98..84d4672 100644 --- a/target-sh4/cpu.c +++ b/target-sh4/cpu.c @@ -1,6 +1,7 @@ /* * QEMU SuperH CPU * + * Copyright (c) 2005 Samuel Tardieu * Copyright (c) 2012 SUSE LINUX Products GmbH * * This library is free software; you can redistribute it and/or @@ -29,9 +30,27 @@ static void superh_cpu_reset(CPUState *s) SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(cpu); CPUSH4State *env = &cpu->env; + if (qemu_loglevel_mask(CPU_LOG_RESET)) { + qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); + log_cpu_state(env, 0); + } + scc->parent_reset(s); - cpu_state_reset(env); + memset(env, 0, offsetof(CPUSH4State, breakpoints)); + tlb_flush(env, 1); + + env->pc = 0xA0000000; +#if defined(CONFIG_USER_ONLY) + env->fpscr = FPSCR_PR; /* value for userspace according to the kernel */ + set_float_rounding_mode(float_round_nearest_even, &env->fp_status); /* ?! */ +#else + env->sr = SR_MD | SR_RB | SR_BL | SR_I3 | SR_I2 | SR_I1 | SR_I0; + env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */ + set_float_rounding_mode(float_round_to_zero, &env->fp_status); + set_flush_to_zero(1, &env->fp_status); +#endif + set_default_nan_mode(1, &env->fp_status); } static void superh_cpu_class_init(ObjectClass *oc, void *data) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 6309e85..d0568e2 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -180,25 +180,7 @@ void cpu_dump_state(CPUSH4State * env, FILE * f, void cpu_state_reset(CPUSH4State *env) { - if (qemu_loglevel_mask(CPU_LOG_RESET)) { - qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); - log_cpu_state(env, 0); - } - - memset(env, 0, offsetof(CPUSH4State, breakpoints)); - tlb_flush(env, 1); - - env->pc = 0xA0000000; -#if defined(CONFIG_USER_ONLY) - env->fpscr = FPSCR_PR; /* value for userspace according to the kernel */ - set_float_rounding_mode(float_round_nearest_even, &env->fp_status); /* ?! */ -#else - env->sr = SR_MD | SR_RB | SR_BL | SR_I3 | SR_I2 | SR_I1 | SR_I0; - env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */ - set_float_rounding_mode(float_round_to_zero, &env->fp_status); - set_flush_to_zero(1, &env->fp_status); -#endif - set_default_nan_mode(1, &env->fp_status); + cpu_reset(ENV_GET_CPU(env)); } typedef struct { @@ -281,7 +263,7 @@ CPUSH4State *cpu_sh4_init(const char *cpu_model) env->movcal_backup_tail = &(env->movcal_backup); sh4_translate_init(); env->cpu_model_str = cpu_model; - cpu_state_reset(env); + cpu_reset(CPU(cpu)); cpu_register(env, def); qemu_init_vcpu(env); return env;