From patchwork Tue Apr 24 09:33:30 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 154633 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 976B1B6FE7 for ; Tue, 24 Apr 2012 19:35:27 +1000 (EST) Received: from localhost ([::1]:35441 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SMc9d-0001tG-GH for incoming@patchwork.ozlabs.org; Tue, 24 Apr 2012 05:35:25 -0400 Received: from eggs.gnu.org ([208.118.235.92]:34085) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SMc8F-0007ac-QL for qemu-devel@nongnu.org; Tue, 24 Apr 2012 05:34:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SMc87-0006SI-1k for qemu-devel@nongnu.org; Tue, 24 Apr 2012 05:33:59 -0400 Received: from cantor2.suse.de ([195.135.220.15]:45371 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SMc86-0006Rr-Pe for qemu-devel@nongnu.org; Tue, 24 Apr 2012 05:33:51 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id A5037914CD; Tue, 24 Apr 2012 11:33:49 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Tue, 24 Apr 2012 11:33:30 +0200 Message-Id: <1335260021-26366-5-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.7 In-Reply-To: <1335260021-26366-1-git-send-email-afaerber@suse.de> References: <1335260021-26366-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: Eduardo Habkost , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Michael Roth Subject: [Qemu-devel] [PATCH v2 04/15] target-i386: Add "family" property to X86CPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add the property early in the initfn so that it can be used in helpers such as mce_init(). Signed-off-by: Andreas Färber Reviewed-by: Eduardo Habkost [AF: Add an error_free(), spotted by Michael Roth] --- target-i386/cpu.c | 39 ++++++++++++++++++++++++++++++++++----- 1 files changed, 34 insertions(+), 5 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index d30185b..ebe9c7e 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -27,6 +27,8 @@ #include "qemu-option.h" #include "qemu-config.h" +#include "qapi/qapi-visit-core.h" + #include "hyperv.h" /* feature flags taken from "Intel Processor Identification and the CPUID @@ -597,13 +599,30 @@ static int check_features_against_host(x86_def_t *guest_def) return rv; } -static void x86_cpuid_version_set_family(CPUX86State *env, int family) +static void x86_cpuid_version_set_family(Object *obj, Visitor *v, void *opaque, + const char *name, Error **errp) { + X86CPU *cpu = X86_CPU(obj); + CPUX86State *env = &cpu->env; + const int64_t min = 0; + const int64_t max = 0xff + 0xf; + int64_t value; + + visit_type_int(v, &value, name, errp); + if (error_is_set(errp)) { + return; + } + if (value < min || value > max) { + error_set(errp, QERR_PROPERTY_VALUE_OUT_OF_RANGE, "", + name ? name : "null", value, min, max); + return; + } + env->cpuid_version &= ~0xff00f00; - if (family > 0x0f) { - env->cpuid_version |= 0xf00 | ((family - 0x0f) << 20); + if (value > 0x0f) { + env->cpuid_version |= 0xf00 | ((value - 0x0f) << 20); } else { - env->cpuid_version |= family << 8; + env->cpuid_version |= value << 8; } } @@ -911,6 +930,7 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model) { CPUX86State *env = &cpu->env; x86_def_t def1, *def = &def1; + Error *error = NULL; memset(def, 0, sizeof(*def)); @@ -927,7 +947,7 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model) } env->cpuid_vendor_override = def->vendor_override; env->cpuid_level = def->level; - x86_cpuid_version_set_family(env, def->family); + object_property_set_int(OBJECT(cpu), def->family, "family", &error); x86_cpuid_version_set_model(env, def->model); x86_cpuid_version_set_stepping(env, def->stepping); env->cpuid_features = def->features; @@ -952,6 +972,10 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model) env->cpuid_svm_features &= TCG_SVM_FEATURES; } x86_cpuid_set_model_id(env, def->model_id); + if (error_is_set(&error)) { + error_free(error); + return -1; + } return 0; } @@ -1476,6 +1500,11 @@ static void x86_cpu_initfn(Object *obj) CPUX86State *env = &cpu->env; cpu_exec_init(env); + + object_property_add(obj, "family", "int", + NULL, + x86_cpuid_version_set_family, NULL, NULL, NULL); + env->cpuid_apic_id = env->cpu_index; mce_init(cpu); }