From patchwork Tue Apr 24 05:34:31 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [U-Boot] openrisc/cache: disable icache during invalidation From: Stefan Kristiansson X-Patchwork-Id: 154594 Message-Id: <1335245671-20544-1-git-send-email-stefan.kristiansson@saunalahti.fi> To: u-boot@lists.denx.de Date: Tue, 24 Apr 2012 08:34:31 +0300 invalidating the memory area that is being executed while icache is on is a bit adventurous, make sure it's turned off during this operation Signed-off-by: Stefan Kristiansson --- arch/openrisc/cpu/cache.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/openrisc/cpu/cache.c b/arch/openrisc/cpu/cache.c index 2a73a4f..fedfd89 100644 --- a/arch/openrisc/cpu/cache.c +++ b/arch/openrisc/cpu/cache.c @@ -44,11 +44,15 @@ void invalidate_dcache_range(unsigned long addr, unsigned long stop) static void invalidate_icache_range(unsigned long addr, unsigned long stop) { ulong block_size = (mfspr(SPR_ICCFGR) & SPR_ICCFGR_CBS) ? 32 : 16; + ulong ie = icache_status(); + icache_disable(); while (addr < stop) { mtspr(SPR_ICBIR, addr); addr += block_size; } + if (ie) + icache_enable(); } void flush_cache(unsigned long addr, unsigned long size)