From patchwork Mon Apr 23 10:51:23 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Voss, Nikolaus" X-Patchwork-Id: 154415 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from mail-ee0-f56.google.com (mail-ee0-f56.google.com [74.125.83.56]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 02E2EB6FC8 for ; Mon, 23 Apr 2012 22:31:09 +1000 (EST) Received: by eekd41 with SMTP id d41sf2633663eek.11 for ; Mon, 23 Apr 2012 05:31:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlegroups.com; s=beta; h=mime-version:x-beenthere:received-spf:x-rzg-auth:x-rzg-class-id :message-id:x-authentication-warning:from:date:subject:to:cc :x-virus-scanned:x-virus-status:x-original-sender :x-original-authentication-results:reply-to:precedence:mailing-list :list-id:x-google-group-id:list-post:list-help:list-archive:sender :list-subscribe:list-unsubscribe:content-type; bh=EpxkLUnKSyNx6f6i1B2N3ADN4HWb8dtENt9/Vwd+3Ok=; b=f8SGCcr9KZeXq2/3yDcmjT3zs0701fqAzMBtKmepg4ugykeoyPzS8OprlvXi11/pXb cq4WW1ArFewA/eR2mELcjUKKFp6gGI3iROo0NhUWRYEB86auHPnNdwCCgLTXW51uskUb M314uUulAqbmk//8wnCPvbm4tqRueYDMBBaU0= Received: by 10.216.198.198 with SMTP id v48mr435556wen.66.1335184265132; Mon, 23 Apr 2012 05:31:05 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: rtc-linux@googlegroups.com Received: by 10.180.103.138 with SMTP id fw10ls4549562wib.1.gmail; Mon, 23 Apr 2012 05:31:04 -0700 (PDT) Received: by 10.180.19.71 with SMTP id c7mr1759209wie.0.1335184264498; Mon, 23 Apr 2012 05:31:04 -0700 (PDT) Received: by 10.180.19.71 with SMTP id c7mr1759208wie.0.1335184264489; Mon, 23 Apr 2012 05:31:04 -0700 (PDT) Received: from mo-p05-ob.rzone.de (mo-p05-ob.rzone.de. [81.169.146.181]) by gmr-mx.google.com with ESMTPS id fm5si3489621wib.2.2012.04.23.05.31.04 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 23 Apr 2012 05:31:04 -0700 (PDT) Received-SPF: neutral (google.com: 81.169.146.181 is neither permitted nor denied by best guess record for domain of n.voss@weinmann.de) client-ip=81.169.146.181; X-RZG-AUTH: :KXokZlStbvrPCC8w2n2KADUjx90tFpDbrwvi3rISAmCHBWiKTAoKIqY5gZEywA== X-RZG-CLASS-ID: mo05 Received: from gatekeeper.vosshq.de ([85.183.17.159]) by smtp.strato.de (joses mo1) (RZmta 28.12 AUTH) with (DHE-RSA-AES256-SHA encrypted) ESMTPA id e07f17o3NBrBwJ ; Mon, 23 Apr 2012 14:30:43 +0200 (CEST) Received: from gatekeeper.vosshq.de (localhost [127.0.0.1]) by gatekeeper.vosshq.de (8.14.2/8.14.2/Debian-2build1) with ESMTP id q3NCUeNx015328 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 23 Apr 2012 14:30:41 +0200 Received: (from nn@localhost) by gatekeeper.vosshq.de (8.14.2/8.14.2/Submit) id q3NCUbbP015327; Mon, 23 Apr 2012 14:30:37 +0200 Message-Id: <201204231230.q3NCUbbP015327@gatekeeper.vosshq.de> X-Authentication-Warning: gatekeeper.vosshq.de: nn set sender to n.voss@weinmann.de using -f From: Nikolaus Voss Date: Mon, 23 Apr 2012 12:51:23 +0200 Subject: [rtc-linux] [PATCH] drivers/rtc/rtc-m41t93.c: don't let get_time() reset error state To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, rtc-linux@googlegroups.com Cc: akpm@linux-foundation.org, a.zummo@towertech.it, grant.likely@secretlab.ca X-Virus-Scanned: clamav-milter 0.97.2 at gatekeeper X-Virus-Status: Clean X-Original-Sender: n.voss@weinmann.de X-Original-Authentication-Results: gmr-mx.google.com; spf=neutral (google.com: 81.169.146.181 is neither permitted nor denied by best guess record for domain of n.voss@weinmann.de) smtp.mail=n.voss@weinmann.de Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: Sender: rtc-linux@googlegroups.com List-Subscribe: , List-Unsubscribe: , If the rtc reports the time might be invalid due to oscillator failure, this flags must not be reset by get_time() as the read operation doesn't make the time valid. Instead, the flag is reset in set_time() when a valid time is to be written. Signed-off-by: Nikolaus Voss --- drivers/rtc/rtc-m41t93.c | 46 +++++++++++++++++++++++++++------------------- 1 files changed, 27 insertions(+), 19 deletions(-) diff --git a/drivers/rtc/rtc-m41t93.c b/drivers/rtc/rtc-m41t93.c index ef71132..f19f45c 100644 --- a/drivers/rtc/rtc-m41t93.c +++ b/drivers/rtc/rtc-m41t93.c @@ -48,6 +48,7 @@ static inline int m41t93_set_reg(struct spi_device *spi, u8 addr, u8 data) static int m41t93_set_time(struct device *dev, struct rtc_time *tm) { struct spi_device *spi = to_spi_device(dev); + int tmp; u8 buf[9] = {0x80}; /* write cmd + 8 data bytes */ u8 * const data = &buf[1]; /* ptr to first data byte */ @@ -62,6 +63,30 @@ static int m41t93_set_time(struct device *dev, struct rtc_time *tm) return -EINVAL; } + tmp = spi_w8r8(spi, M41T93_REG_FLAGS); + if (tmp < 0) + return tmp; + + if (tmp & M41T93_FLAG_OF) { + dev_warn(&spi->dev, "OF bit is set, resetting.\n"); + m41t93_set_reg(spi, M41T93_REG_FLAGS, tmp & ~M41T93_FLAG_OF); + + tmp = spi_w8r8(spi, M41T93_REG_FLAGS); + if (tmp < 0) { + return tmp; + } else if (tmp & M41T93_FLAG_OF) { + /* OF cannot be immediately reset: oscillator has to be + * restarted. */ + u8 reset_osc = buf[M41T93_REG_ST_SEC] | M41T93_FLAG_ST; + + dev_warn(&spi->dev, + "OF bit is still set, kickstarting clock.\n"); + m41t93_set_reg(spi, M41T93_REG_ST_SEC, reset_osc); + reset_osc &= ~M41T93_FLAG_ST; + m41t93_set_reg(spi, M41T93_REG_ST_SEC, reset_osc); + } + } + data[M41T93_REG_SSEC] = 0; data[M41T93_REG_ST_SEC] = bin2bcd(tm->tm_sec); data[M41T93_REG_MIN] = bin2bcd(tm->tm_min); @@ -89,10 +114,7 @@ static int m41t93_get_time(struct device *dev, struct rtc_time *tm) 1. halt bit (HT) is set: the clock is running but update of readout registers has been disabled due to power failure. This is normal case after poweron. Time is valid after resetting HT bit. - 2. oscillator fail bit (OF) is set. Oscillator has be stopped and - time is invalid: - a) OF can be immeditely reset. - b) OF cannot be immediately reset: oscillator has to be restarted. + 2. oscillator fail bit (OF) is set: time is invalid. */ tmp = spi_w8r8(spi, M41T93_REG_ALM_HOUR_HT); if (tmp < 0) @@ -110,21 +132,7 @@ static int m41t93_get_time(struct device *dev, struct rtc_time *tm) if (tmp & M41T93_FLAG_OF) { ret = -EINVAL; - dev_warn(&spi->dev, "OF bit is set, resetting.\n"); - m41t93_set_reg(spi, M41T93_REG_FLAGS, tmp & ~M41T93_FLAG_OF); - - tmp = spi_w8r8(spi, M41T93_REG_FLAGS); - if (tmp < 0) - return tmp; - else if (tmp & M41T93_FLAG_OF) { - u8 reset_osc = buf[M41T93_REG_ST_SEC] | M41T93_FLAG_ST; - - dev_warn(&spi->dev, - "OF bit is still set, kickstarting clock.\n"); - m41t93_set_reg(spi, M41T93_REG_ST_SEC, reset_osc); - reset_osc &= ~M41T93_FLAG_ST; - m41t93_set_reg(spi, M41T93_REG_ST_SEC, reset_osc); - } + dev_warn(&spi->dev, "OF bit is set, write time to restart.\n"); } if (tmp & M41T93_FLAG_BL)