From patchwork Sat Apr 21 08:11:32 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: stigge@antcom.de X-Patchwork-Id: 154204 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from mail-wg0-f56.google.com (mail-wg0-f56.google.com [74.125.82.56]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id EB6C3B6FD8 for ; Sat, 21 Apr 2012 18:11:47 +1000 (EST) Received: by wgbds11 with SMTP id ds11sf5859867wgb.11 for ; Sat, 21 Apr 2012 01:11:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlegroups.com; s=beta; h=mime-version:x-beenthere:received-spf:from:to:cc:subject:date :message-id:x-mailer:x-feas-system-wl:x-original-sender :x-original-authentication-results:reply-to:precedence:mailing-list :list-id:x-google-group-id:list-post:list-help:list-archive:sender :list-subscribe:list-unsubscribe:content-type; bh=0rcSerybEt7sCxuJebfLiUIj++Wbcq4T+q7FkefFgtc=; b=SMsye4fhFxfShqa6z+TSntV3dJJW2P7n6u5A4DzvBRIXyuH2YCQTet0qHy+BtnEHLF tHC4bhC1ZY2GqDswmRykm8e6TcT+DohjWP8VpqzdIyubRvvwUVK9ZFIwceFdqkFsyYDj v/k4S1pxtUL99iEGmkktczZDkvhH7dxdJutoA= Received: by 10.180.105.10 with SMTP id gi10mr980319wib.0.1334995899506; Sat, 21 Apr 2012 01:11:39 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: rtc-linux@googlegroups.com Received: by 10.216.39.14 with SMTP id c14ls5196555web.6.gmail; Sat, 21 Apr 2012 01:11:38 -0700 (PDT) Received: by 10.180.90.198 with SMTP id by6mr338312wib.4.1334995898335; Sat, 21 Apr 2012 01:11:38 -0700 (PDT) Received: by 10.180.90.198 with SMTP id by6mr338311wib.4.1334995898324; Sat, 21 Apr 2012 01:11:38 -0700 (PDT) Received: from work-microwave.de (mail.work-microwave.de. [62.245.205.51]) by gmr-mx.google.com with ESMTPS id n4si267843wiw.0.2012.04.21.01.11.38 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 21 Apr 2012 01:11:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of rst@work-microwave.de designates 62.245.205.51 as permitted sender) client-ip=62.245.205.51; Received: from rst-pc1.lan.work-microwave.de ([192.168.11.78]) (authenticated bits=0) by mail.work-microwave.de with ESMTP id q3L8BYW9026957 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Sat, 21 Apr 2012 09:11:35 +0100 Received: by rst-pc1.lan.work-microwave.de (Postfix, from userid 1000) id 8008AAE074; Sat, 21 Apr 2012 10:11:34 +0200 (CEST) From: Roland Stigge To: a.zummo@towertech.it, grant.likely@secretlab.ca, rob.herring@calxeda.com, rtc-linux@googlegroups.com, linux-kernel@vger.kernel.org, arm@kernel.org, linux-arm-kernel@lists.infradead.org Cc: Roland Stigge Subject: [rtc-linux] [PATCH v5] rtc: Add device tree support for LPC32xx Date: Sat, 21 Apr 2012 10:11:32 +0200 Message-Id: <1334995893-14402-1-git-send-email-stigge@antcom.de> X-Mailer: git-send-email 1.7.9 X-FEAS-SYSTEM-WL: rst@work-microwave.de, 192.168.11.78 X-Original-Sender: stigge@antcom.de X-Original-Authentication-Results: gmr-mx.google.com; spf=pass (google.com: best guess record for domain of rst@work-microwave.de designates 62.245.205.51 as permitted sender) smtp.mail=rst@work-microwave.de Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: Sender: rtc-linux@googlegroups.com List-Subscribe: , List-Unsubscribe: , This patch adds device tree support for rtc-lpc32xx.c Signed-off-by: Roland Stigge --- Applies to v3.4-rc3 Changes since v4: * Reduced "compatible" strings to just the first one Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt | 15 +++++++++++++++ drivers/rtc/rtc-lpc32xx.c | 12 +++++++++++- 2 files changed, 26 insertions(+), 1 deletion(-) --- /dev/null +++ linux-2.6/Documentation/devicetree/bindings/rtc/lpc32xx-rtc.txt @@ -0,0 +1,15 @@ +* NXP LPC32xx SoC Real Time Clock controller + +Required properties: +- compatible: must be "nxp,lpc3220-rtc" +- reg: physical base address of the controller and length of memory mapped + region. +- interrupts: The RTC interrupt + +Example: + + rtc@40024000 { + compatible = "nxp,lpc3220-rtc"; + reg = <0x40024000 0x1000>; + interrupts = <52 0>; + }; --- linux-2.6.orig/drivers/rtc/rtc-lpc32xx.c +++ linux-2.6/drivers/rtc/rtc-lpc32xx.c @@ -19,6 +19,7 @@ #include #include #include +#include /* * Clock and Power control register offsets @@ -386,13 +387,22 @@ static const struct dev_pm_ops lpc32xx_r #define LPC32XX_RTC_PM_OPS NULL #endif +#ifdef CONFIG_OF +static const struct of_device_id lpc32xx_rtc_match[] = { + { .compatible = "nxp,lpc3220-rtc" }, + { } +}; +MODULE_DEVICE_TABLE(of, lpc32xx_rtc_match); +#endif + static struct platform_driver lpc32xx_rtc_driver = { .probe = lpc32xx_rtc_probe, .remove = __devexit_p(lpc32xx_rtc_remove), .driver = { .name = RTC_NAME, .owner = THIS_MODULE, - .pm = LPC32XX_RTC_PM_OPS + .pm = LPC32XX_RTC_PM_OPS, + .of_match_table = of_match_ptr(lpc32xx_rtc_match), }, };