From patchwork Thu Apr 19 13:33:12 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153773 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id BF3CBB7007 for ; Fri, 20 Apr 2012 00:15:37 +1000 (EST) Received: from localhost ([::1]:44640 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SKrVb-0006a8-PV for incoming@patchwork.ozlabs.org; Thu, 19 Apr 2012 09:34:51 -0400 Received: from eggs.gnu.org ([208.118.235.92]:49281) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SKrUk-0004Yz-48 for qemu-devel@nongnu.org; Thu, 19 Apr 2012 09:34:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SKrUc-00008c-Cw for qemu-devel@nongnu.org; Thu, 19 Apr 2012 09:33:57 -0400 Received: from mail-yw0-f45.google.com ([209.85.213.45]:36099) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SKrUc-000069-75 for qemu-devel@nongnu.org; Thu, 19 Apr 2012 09:33:50 -0400 Received: by mail-yw0-f45.google.com with SMTP id o21so5709738yho.4 for ; Thu, 19 Apr 2012 06:33:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=Udl6XO+jW8weDlC0X5xf8va6psap2teejgPHYTPd8WA=; b=gUGjwwhijsA/NXH7RDG9sumMAyHyiGy+cpYTUD8YNi+eL+mcYMLyd1qibWWee8nx9q 7OH9/SzHXYbBGX5Fvn9Sc7WO9mVOgNl4ZSYgDhN8LTBVTe2OhXlZM70hLrjeTsqJQqT/ 7TpsC/zMQB1UN6dWBtiSAOnbAneEdd7svJzgyxyBvazn4LJX2NUraplhPQ2bwfv9bBq6 QxFFWwiMYdlE8zPsLKBZg1NpMpLtzv63hga/3ExXKsy8JVKKRTFGTLd06gYqpDJGLsrm FQSZyKdlnHzsu34A9NDZ8hW1MKkFd3Hs9RjeR4y4t2ZVntoPGo/HtdoBN2xbEbmZrYfy m72g== Received: by 10.50.88.199 with SMTP id bi7mr5446656igb.26.1334842429311; Thu, 19 Apr 2012 06:33:49 -0700 (PDT) Received: from pebble.com ([12.236.175.36]) by mx.google.com with ESMTPS id b11sm6529633igq.7.2012.04.19.06.33.48 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 19 Apr 2012 06:33:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 19 Apr 2012 08:33:12 -0500 Message-Id: <1334842395-31819-12-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1334842395-31819-1-git-send-email-rth@twiddle.net> References: <1334842395-31819-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.213.45 Cc: blauwirbel@gmail.com Subject: [Qemu-devel] [PATCH 11/14] tcg-sparc: Mask shift immediates to avoid illegal insns. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The xtensa-test image generates a sra_i32 with count 0x40. Whether this is accident of tcg constant propagation or originating directly from the instruction stream is immaterial. Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 18 ++++++++++++------ 1 files changed, 12 insertions(+), 6 deletions(-) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 88c5140..5b3cde4 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -1184,13 +1184,16 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, goto gen_arith; case INDEX_op_shl_i32: c = SHIFT_SLL; - goto gen_arith; + do_shift32: + /* Limit immediate shift count lest we create an illegal insn. */ + tcg_out_arithc(s, args[0], args[1], args[2] & 31, const_args[2], c); + break; case INDEX_op_shr_i32: c = SHIFT_SRL; - goto gen_arith; + goto do_shift32; case INDEX_op_sar_i32: c = SHIFT_SRA; - goto gen_arith; + goto do_shift32; case INDEX_op_mul_i32: c = ARITH_UMUL; goto gen_arith; @@ -1311,13 +1314,16 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, break; case INDEX_op_shl_i64: c = SHIFT_SLLX; - goto gen_arith; + do_shift64: + /* Limit immediate shift count lest we create an illegal insn. */ + tcg_out_arithc(s, args[0], args[1], args[2] & 63, const_args[2], c); + break; case INDEX_op_shr_i64: c = SHIFT_SRLX; - goto gen_arith; + goto do_shift64; case INDEX_op_sar_i64: c = SHIFT_SRAX; - goto gen_arith; + goto do_shift64; case INDEX_op_mul_i64: c = ARITH_MULX; goto gen_arith;