From patchwork Sat Apr 14 22:12:38 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [v3,06/13] target-sh4: Make cpu_sh4_invalidate_tlb() take SuperHCPU Date: Sat, 14 Apr 2012 12:12:38 -0000 From: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 152575 Message-Id: <1334441565-26433-7-git-send-email-afaerber@suse.de> To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , Aurelien Jarno Change argument type from CPUSH4State to SuperHCPU. This simplifies the SH7750 SoC as its only caller. Signed-off-by: Andreas Färber --- hw/sh7750.c | 2 +- target-sh4/cpu.h | 2 +- target-sh4/helper.c | 8 ++++---- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/sh7750.c b/hw/sh7750.c index 23950aa..ca7839e 100644 --- a/hw/sh7750.c +++ b/hw/sh7750.c @@ -406,7 +406,7 @@ static void sh7750_mem_writel(void *opaque, target_phys_addr_t addr, return; case SH7750_MMUCR_A7: if (mem_value & MMUCR_TI) { - cpu_sh4_invalidate_tlb(&s->cpu->env); + cpu_sh4_invalidate_tlb(s->cpu); } s->cpu->env.mmucr = mem_value & ~MMUCR_TI; return; diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index 6a518f2..4e0114c 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -199,7 +199,7 @@ void do_interrupt(CPUSH4State * env); void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf); #if !defined(CONFIG_USER_ONLY) -void cpu_sh4_invalidate_tlb(CPUSH4State *s); +void cpu_sh4_invalidate_tlb(SuperHCPU *cpu); uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s, target_phys_addr_t addr); void cpu_sh4_write_mmaped_itlb_addr(CPUSH4State *s, target_phys_addr_t addr, diff --git a/target-sh4/helper.c b/target-sh4/helper.c index 5c57380..655faaa 100644 --- a/target-sh4/helper.c +++ b/target-sh4/helper.c @@ -555,22 +555,22 @@ void cpu_load_tlb(CPUSH4State * env) entry->tc = (uint8_t)cpu_ptea_tc(env->ptea); } - void cpu_sh4_invalidate_tlb(CPUSH4State *s) +void cpu_sh4_invalidate_tlb(SuperHCPU *cpu) { int i; /* UTLB */ for (i = 0; i < UTLB_SIZE; i++) { - tlb_t * entry = &s->utlb[i]; + tlb_t *entry = &cpu->env.utlb[i]; entry->v = 0; } /* ITLB */ for (i = 0; i < ITLB_SIZE; i++) { - tlb_t * entry = &s->itlb[i]; + tlb_t *entry = &cpu->env.itlb[i]; entry->v = 0; } - tlb_flush(s, 1); + tlb_flush(&cpu->env, 1); } uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s,