From patchwork Sat Apr 14 16:42:21 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 152539 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A0C01B7004 for ; Sun, 15 Apr 2012 03:57:20 +1000 (EST) Received: from localhost ([::1]:46448 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SJ6IJ-0007d3-CM for incoming@patchwork.ozlabs.org; Sat, 14 Apr 2012 12:57:51 -0400 Received: from eggs.gnu.org ([208.118.235.92]:56907) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SJ6HO-0004s4-Tl for qemu-devel@nongnu.org; Sat, 14 Apr 2012 12:57:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SJ6HA-0005Fs-KE for qemu-devel@nongnu.org; Sat, 14 Apr 2012 12:56:54 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:58002) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SJ6HA-0005Ek-Al for qemu-devel@nongnu.org; Sat, 14 Apr 2012 12:56:40 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SJ63M-00087C-Sq; Sat, 14 Apr 2012 17:42:24 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Sat, 14 Apr 2012 17:42:21 +0100 Message-Id: <1334421743-31146-14-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1334421743-31146-1-git-send-email-peter.maydell@linaro.org> References: <1334421743-31146-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 81.2.115.146 Cc: Paul Brook , Anthony Liguori , =?UTF-8?q?Andreas=20F=C3=A4rber?= , patches@linaro.org Subject: [Qemu-devel] [PATCH v2 12/14] target-arm: Drop cpu_reset_model_id() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org cpu_reset_model_id() is now empty and we can remove it. Signed-off-by: Peter Maydell Acked-by: Andreas Färber --- target-arm/helper.c | 59 +-------------------------------------------------- 1 files changed, 1 insertions(+), 58 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 5cbc7e0..653885a 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -7,66 +7,12 @@ #endif #include "sysemu.h" -static void cpu_reset_model_id(CPUARMState *env, uint32_t id) -{ - switch (id) { - case ARM_CPUID_ARM926: - break; - case ARM_CPUID_ARM946: - break; - case ARM_CPUID_ARM1026: - break; - case ARM_CPUID_ARM1136: - /* This is the 1136 r1, which is a v6K core */ - case ARM_CPUID_ARM1136_R2: - break; - case ARM_CPUID_ARM1176: - break; - case ARM_CPUID_ARM11MPCORE: - break; - case ARM_CPUID_CORTEXA8: - break; - case ARM_CPUID_CORTEXA9: - break; - case ARM_CPUID_CORTEXA15: - break; - case ARM_CPUID_CORTEXM3: - break; - case ARM_CPUID_ANY: /* For userspace emulation. */ - break; - case ARM_CPUID_TI915T: - case ARM_CPUID_TI925T: - break; - case ARM_CPUID_PXA250: - case ARM_CPUID_PXA255: - case ARM_CPUID_PXA260: - case ARM_CPUID_PXA261: - case ARM_CPUID_PXA262: - break; - case ARM_CPUID_PXA270_A0: - case ARM_CPUID_PXA270_A1: - case ARM_CPUID_PXA270_B0: - case ARM_CPUID_PXA270_B1: - case ARM_CPUID_PXA270_C0: - case ARM_CPUID_PXA270_C5: - break; - case ARM_CPUID_SA1100: - case ARM_CPUID_SA1110: - break; - default: - cpu_abort(env, "Bad CPU ID: %x\n", id); - break; - } - -} - /* TODO Move contents into arm_cpu_reset() in cpu.c, * once cpu_reset_model_id() is eliminated, * and then forward to cpu_reset() here. */ void cpu_state_reset(CPUARMState *env) { - uint32_t id; uint32_t tmp = 0; ARMCPU *cpu = arm_env_get_cpu(env); @@ -75,11 +21,8 @@ void cpu_state_reset(CPUARMState *env) log_cpu_state(env, 0); } - id = cpu->midr; tmp = env->cp15.c15_config_base_address; memset(env, 0, offsetof(CPUARMState, breakpoints)); - if (id) - cpu_reset_model_id(env, id); env->cp15.c15_config_base_address = tmp; env->cp15.c0_cpuid = cpu->midr; env->vfp.xregs[ARM_VFP_FPSID] = cpu->reset_fpsid; @@ -144,7 +87,7 @@ void cpu_state_reset(CPUARMState *env) /* v7 performance monitor control register: same implementor * field as main ID register, and we implement no event counters. */ - env->cp15.c9_pmcr = (id & 0xff000000); + env->cp15.c9_pmcr = (cpu->midr & 0xff000000); #endif set_flush_to_zero(1, &env->vfp.standard_fp_status); set_flush_inputs_to_zero(1, &env->vfp.standard_fp_status);