Patchwork [v2,14/14] target-arm: Move A9 config_base_address reset value to ARMCPU

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Submitter Peter Maydell
Date April 14, 2012, 4:42 p.m.
Message ID <1334421743-31146-16-git-send-email-peter.maydell@linaro.org>
Download mbox | patch
Permalink /patch/152523/
State New
Headers show

Comments

Peter Maydell - April 14, 2012, 4:42 p.m.
Move the A9 config_base_address cp15 register reset value to
ARMCPU. This should become a QOM property so that the Highbank
board can set it without having to pull in cpu-qom.h, but at
least this avoids the implicit dependency on reset ordering
that the previous workaround had.

Cc: Mark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/highbank.c        |   11 ++++-------
 target-arm/cpu-qom.h |    1 +
 target-arm/cpu.c     |    4 +---
 3 files changed, 6 insertions(+), 10 deletions(-)
Andreas Färber - April 20, 2012, 5:01 p.m.
Am 14.04.2012 18:42, schrieb Peter Maydell:
> Move the A9 config_base_address cp15 register reset value to
> ARMCPU. This should become a QOM property so that the Highbank
> board can set it without having to pull in cpu-qom.h, but at
> least this avoids the implicit dependency on reset ordering
> that the previous workaround had.
> 
> Cc: Mark Langsdorf <mark.langsdorf@calxeda.com>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  hw/highbank.c        |   11 ++++-------
>  target-arm/cpu-qom.h |    1 +
>  target-arm/cpu.c     |    4 +---
>  3 files changed, 6 insertions(+), 10 deletions(-)
> 
> diff --git a/hw/highbank.c b/hw/highbank.c
> index 906eed5..9ff639b 100644
> --- a/hw/highbank.c
> +++ b/hw/highbank.c
[...]
> @@ -213,14 +207,17 @@ static void highbank_init(ram_addr_t ram_size,
>      }
>  
>      for (n = 0; n < smp_cpus; n++) {
> +        ARMCPU *cpu;
>          env = cpu_init(cpu_model);
>          if (!env) {
>              fprintf(stderr, "Unable to find CPU definition\n");
>              exit(1);
>          }
> +        cpu = arm_env_get_cpu(env);

Ugh, I'd like to avoid this creeping into boards... Would you mind
applying the updated 1-13 (they should all have some tag of mine now)
and rebasing this one on a patch that I'll send you shortly, changing
cpu_arm_init() signature?

Otherwise looks okay.

Andreas
Peter Maydell - April 20, 2012, 5:18 p.m.
On 20 April 2012 18:01, Andreas Färber <afaerber@suse.de> wrote:
> Am 14.04.2012 18:42, schrieb Peter Maydell:
>> @@ -213,14 +207,17 @@ static void highbank_init(ram_addr_t ram_size,
>>      }
>>
>>      for (n = 0; n < smp_cpus; n++) {
>> +        ARMCPU *cpu;
>>          env = cpu_init(cpu_model);
>>          if (!env) {
>>              fprintf(stderr, "Unable to find CPU definition\n");
>>              exit(1);
>>          }
>> +        cpu = arm_env_get_cpu(env);
>
> Ugh, I'd like to avoid this creeping into boards... Would you mind
> applying the updated 1-13 (they should all have some tag of mine now)
> and rebasing this one on a patch that I'll send you shortly, changing
> cpu_arm_init() signature?

Aren't boards going to need arm_env_get_cpu() anyway, since they
need to get at a QOM object to set properties on?

(I'm happy to leave this patch off if it's not fully baked yet.
I'll put 1-13 in a pullreq tomorrow I think.)

-- PMM

Patch

diff --git a/hw/highbank.c b/hw/highbank.c
index 906eed5..9ff639b 100644
--- a/hw/highbank.c
+++ b/hw/highbank.c
@@ -35,12 +35,6 @@ 
 #define NIRQ_GIC      160
 
 /* Board init.  */
-static void highbank_cpu_reset(void *opaque)
-{
-    CPUARMState *env = opaque;
-
-    env->cp15.c15_config_base_address = GIC_BASE_ADDR;
-}
 
 static void hb_write_secondary(CPUARMState *env, const struct arm_boot_info *info)
 {
@@ -213,14 +207,17 @@  static void highbank_init(ram_addr_t ram_size,
     }
 
     for (n = 0; n < smp_cpus; n++) {
+        ARMCPU *cpu;
         env = cpu_init(cpu_model);
         if (!env) {
             fprintf(stderr, "Unable to find CPU definition\n");
             exit(1);
         }
+        cpu = arm_env_get_cpu(env);
+        /* This will become a QOM property eventually */
+        cpu->reset_cbar = GIC_BASE_ADDR;
         irqp = arm_pic_init_cpu(env);
         cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];
-        qemu_register_reset(highbank_cpu_reset, env);
     }
 
     sysmem = get_system_memory();
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index b6c044a..4abfa90 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -94,6 +94,7 @@  typedef struct ARMCPU {
      * in the order L1DCache, L1ICache, L2DCache, L2ICache, etc.
      */
     uint32_t ccsidr[16];
+    uint32_t reset_cbar;
 } ARMCPU;
 
 static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 77347b0..8f5e309 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -30,7 +30,6 @@  static void arm_cpu_reset(CPUState *s)
     ARMCPU *cpu = ARM_CPU(s);
     ARMCPUClass *acc = ARM_CPU_GET_CLASS(cpu);
     CPUARMState *env = &cpu->env;
-    uint32_t tmp = 0;
 
     if (qemu_loglevel_mask(CPU_LOG_RESET)) {
         qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
@@ -39,9 +38,8 @@  static void arm_cpu_reset(CPUState *s)
 
     acc->parent_reset(s);
 
-    tmp = env->cp15.c15_config_base_address;
     memset(env, 0, offsetof(CPUARMState, breakpoints));
-    env->cp15.c15_config_base_address = tmp;
+    env->cp15.c15_config_base_address = cpu->reset_cbar;
     env->cp15.c0_cpuid = cpu->midr;
     env->vfp.xregs[ARM_VFP_FPSID] = cpu->reset_fpsid;
     env->vfp.xregs[ARM_VFP_MVFR0] = cpu->mvfr0;