Patchwork [v2,04/13] target-sh4: Do not reset CPU feature flags on reset

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Submitter Andreas Färber
Date April 13, 2012, 9:30 p.m.
Message ID <1334352618-4551-5-git-send-email-afaerber@suse.de>
Download mbox | patch
Permalink /patch/152457/
State New
Headers show

Comments

Andreas Färber - April 13, 2012, 9:30 p.m.
Move them out of CPUSH4State so that they are not zero'ed on reset.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/sh7750.c            |    5 +++--
 target-sh4/cpu-qom.h   |    3 +++
 target-sh4/cpu.h       |    3 ---
 target-sh4/translate.c |    5 +++--
 4 files changed, 9 insertions(+), 7 deletions(-)

Patch

diff --git a/hw/sh7750.c b/hw/sh7750.c
index e712928..c7e653c 100644
--- a/hw/sh7750.c
+++ b/hw/sh7750.c
@@ -77,10 +77,11 @@  typedef struct SH7750State {
     struct intc_desc intc;
 } SH7750State;
 
-static inline int has_bcr3_and_bcr4(SH7750State * s)
+static inline int has_bcr3_and_bcr4(SH7750State *s)
 {
-	return (s->cpu->features & SH_FEATURE_BCR3_AND_BCR4);
+    return sh_env_get_cpu(s->cpu)->features & SH_FEATURE_BCR3_AND_BCR4;
 }
+
 /**********************************************************************
  I/O ports
 **********************************************************************/
diff --git a/target-sh4/cpu-qom.h b/target-sh4/cpu-qom.h
index 097a078..1366150 100644
--- a/target-sh4/cpu-qom.h
+++ b/target-sh4/cpu-qom.h
@@ -49,6 +49,7 @@  typedef struct SuperHCPUClass {
 /**
  * SuperHCPU:
  * @env: #CPUSH4State
+ * @features: CPU feature flags, see #sh_features.
  *
  * A SuperH CPU.
  */
@@ -58,6 +59,8 @@  typedef struct SuperHCPU {
     /*< public >*/
 
     CPUSH4State env;
+
+    uint32_t features;
 } SuperHCPU;
 
 static inline SuperHCPU *sh_env_get_cpu(CPUSH4State *env)
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index ec5e6cf..ee8ba5e 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -157,9 +157,6 @@  typedef struct CPUSH4State {
     /* float point status register */
     float_status fp_status;
 
-    /* The features that we should emulate. See sh_features above.  */
-    uint32_t features;
-
     /* Those belong to the specific unit (SH7750) but are handled here */
     uint32_t mmucr;		/* MMU control register */
     uint32_t pteh;		/* page table entry high register */
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index b7426f1..176c7d4 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -258,7 +258,7 @@  CPUSH4State *cpu_sh4_init(const char *cpu_model)
 	return NULL;
     cpu = SUPERH_CPU(object_new(TYPE_SUPERH_CPU));
     env = &cpu->env;
-    env->features = def->features;
+    cpu->features = def->features;
     sh4_translate_init();
     env->cpu_model_str = cpu_model;
     cpu_register(env, def);
@@ -1902,6 +1902,7 @@  static inline void
 gen_intermediate_code_internal(CPUSH4State * env, TranslationBlock * tb,
                                int search_pc)
 {
+    SuperHCPU *cpu = sh_env_get_cpu(env);
     DisasContext ctx;
     target_ulong pc_start;
     static uint16_t *gen_opc_end;
@@ -1923,7 +1924,7 @@  gen_intermediate_code_internal(CPUSH4State * env, TranslationBlock * tb,
     ctx.delayed_pc = -1; /* use delayed pc from env pointer */
     ctx.tb = tb;
     ctx.singlestep_enabled = env->singlestep_enabled;
-    ctx.features = env->features;
+    ctx.features = cpu->features;
     ctx.has_movcal = (tb->flags & TB_FLAG_PENDING_MOVCA);
 
     ii = -1;