Patchwork libspe2: add SPE_CPU_TYPE query to spe_cpu_info_get

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Submitter D. Herrendoerfer
Date Sept. 25, 2008, 1:27 p.m.
Message ID <20AA09B7-D403-4D7C-AA0B-41E8D5ECBE94@herrendoerfer.name>
Download mbox | patch
Permalink /patch/1524/
State New
Headers show

Comments

D. Herrendoerfer - Sept. 25, 2008, 1:27 p.m.
Resending, Asayama-san you were right.

This patch adds the SPE_CPU_TYPE query to the
spe_cpu_info_get() function. The list of EDP
capable CPUs is quite short, if anyone has
more information about PVR values please send them
to me.

Signed-off-by: D.Herrendoerfer <herrend at de.ibm.com>
Kazunori Asayama - Sept. 29, 2008, 5:40 a.m.
D. Herrendoerfer wrote:
> Resending, Asayama-san you were right.
> 
> This patch adds the SPE_CPU_TYPE query to the
> spe_cpu_info_get() function. The list of EDP
> capable CPUs is quite short, if anyone has
> more information about PVR values please send them
> to me.
> 
> Signed-off-by: D.Herrendoerfer <herrend at de.ibm.com>

Looks good. Please apply it.

BTW, there are extra spaces at the beginning of lines in your patch
(maybe because of your MUA?), so I needed to remove them from the patch
before applying it.
D. Herrendoerfer - Oct. 1, 2008, 1:17 p.m.
Added to svn in rev 134.

Regards,

D.Herrendoerfer

On Mon, 2008-09-29 at 14:40 +0900, Kazunori Asayama wrote:
> D. Herrendoerfer wrote:
> > Resending, Asayama-san you were right.
> > 
> > This patch adds the SPE_CPU_TYPE query to the
> > spe_cpu_info_get() function. The list of EDP
> > capable CPUs is quite short, if anyone has
> > more information about PVR values please send them
> > to me.
> > 
> > Signed-off-by: D.Herrendoerfer <herrend at de.ibm.com>
> 
> Looks good. Please apply it.
> 
> BTW, there are extra spaces at the beginning of lines in your patch
> (maybe because of your MUA?), so I needed to remove them from the patch
> before applying it.
>

Patch

Index: libspe2/spebase/info.h
===================================================================
--- libspe2/spebase/info.h	(revision 133)
+++ libspe2/spebase/info.h	(working copy)
@@ -27,5 +27,12 @@ 
  int _base_spe_count_physical_cpus(int cpu_node);
  int _base_spe_count_physical_spes(int cpu_node);
  int _base_spe_count_usable_spes(int cpu_node);
+int _base_spe_read_cpu_type(int cpu_node);
+
+/* Here is a list of edp capable PVRs
+ * Known non-EDP are: 0x0070 0501 ( PS3, QS20, QS21 )
+ * Known EPD capable: 0x0070 3000 ( QS22 )
+ */
+unsigned long pvr_list_edp[] = {0x00703000, 0};

  #endif
Index: libspe2/spebase/info.c
===================================================================
--- libspe2/spebase/info.c	(revision 133)
+++ libspe2/spebase/info.c	(working copy)
@@ -103,6 +103,24 @@  int _base_spe_count_physical_spes(int cp
  	return ret;
  }

+/* Since there are no mixed-type CPU systems at this time the cpu node
+ * is currently ignored, and a result is generated that returns the
+ * feature set of the currently running CPU.
+ */
+int _base_spe_read_cpu_type(int cpu_node)
+{
+	unsigned long pvr;
+	int i=0;
+	
+	asm volatile ("mfpvr    %0" : "=r"(pvr));
+	
+	while (pvr_list_edp[i] != 0) {
+		if (pvr_list_edp[i++] == pvr)
+			return SPE_CPU_IS_CELLEDP;
+	}
+	
+	return SPE_CPU_IS_CELLBE;
+}

  int _base_spe_cpu_info_get(int info_requested, int cpu_node) {
  	int ret = 0;
@@ -118,6 +136,9 @@  int _base_spe_cpu_info_get(int info_requ
  	case SPE_COUNT_USABLE_SPES:
  		ret = _base_spe_count_usable_spes(cpu_node);
  		break;
+	case SPE_CPU_TYPE:
+		ret = _base_spe_read_cpu_type(cpu_node);
+		break;
  	default:
  		errno = EINVAL;
  		ret = -1;
Index: libspe2/libspe2-types.h
===================================================================
--- libspe2/libspe2-types.h	(revision 133)
+++ libspe2/libspe2-types.h	(working copy)
@@ -262,10 +262,13 @@  enum ps_area { SPE_MSSYNC_AREA, SPE_MFC_
  #define SPE_CALLBACK_UPDATE          2


-
  #define SPE_COUNT_PHYSICAL_CPU_NODES 1
  #define SPE_COUNT_PHYSICAL_SPES      2
  #define SPE_COUNT_USABLE_SPES        3
+#define SPE_CPU_TYPE                 4
+
+#define SPE_CPU_IS_CELLBE            1
+#define SPE_CPU_IS_CELLEDP           2

  /**
   * Signal Targets