Patchwork [v2,06/13] target-sh4: Make cpu_sh4_invalidate_tlb() take SuperHCPU

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Submitter Andreas Färber
Date April 13, 2012, 9:30 p.m.
Message ID <1334352618-4551-7-git-send-email-afaerber@suse.de>
Download mbox | patch
Permalink /patch/152395/
State New
Headers show

Comments

Andreas Färber - April 13, 2012, 9:30 p.m.
Change argument type from CPUSH4State to SuperHCPU.
This simplifies the SH7750 SoC as its only caller.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/sh7750.c         |    2 +-
 target-sh4/cpu.h    |    4 +++-
 target-sh4/helper.c |    8 ++++----
 3 files changed, 8 insertions(+), 6 deletions(-)
Andreas Färber - April 14, 2012, 11:01 a.m.
Am 13.04.2012 23:30, schrieb Andreas Färber:
> Change argument type from CPUSH4State to SuperHCPU.
> This simplifies the SH7750 SoC as its only caller.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  hw/sh7750.c         |    2 +-
>  target-sh4/cpu.h    |    4 +++-
>  target-sh4/helper.c |    8 ++++----
>  3 files changed, 8 insertions(+), 6 deletions(-)
> 
> diff --git a/hw/sh7750.c b/hw/sh7750.c
> index 23950aa..ca7839e 100644
> --- a/hw/sh7750.c
> +++ b/hw/sh7750.c
> @@ -406,7 +406,7 @@ static void sh7750_mem_writel(void *opaque, target_phys_addr_t addr,
>  	return;
>      case SH7750_MMUCR_A7:
>          if (mem_value & MMUCR_TI) {
> -            cpu_sh4_invalidate_tlb(&s->cpu->env);
> +            cpu_sh4_invalidate_tlb(s->cpu);
>          }
>          s->cpu->env.mmucr = mem_value & ~MMUCR_TI;
>          return;
> diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
> index ee8ba5e..32e59e7 100644
> --- a/target-sh4/cpu.h
> +++ b/target-sh4/cpu.h
> @@ -186,6 +186,8 @@ typedef struct CPUSH4State {
>      memory_content **movcal_backup_tail;
>  } CPUSH4State;
>  
> +typedef struct SuperHCPU SuperHCPU;

Duplicate typedef, might lead to a compilation failure so I better
reorder the includes. Old circular #include issue as seen for ARM.

/-F

> +
>  CPUSH4State *cpu_sh4_init(const char *cpu_model);
>  int cpu_sh4_exec(CPUSH4State * s);
>  int cpu_sh4_signal_handler(int host_signum, void *pinfo,
> @@ -197,7 +199,7 @@ void do_interrupt(CPUSH4State * env);
>  
>  void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf);
>  #if !defined(CONFIG_USER_ONLY)
> -void cpu_sh4_invalidate_tlb(CPUSH4State *s);
> +void cpu_sh4_invalidate_tlb(SuperHCPU *cpu);
>  uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s,
>                                         target_phys_addr_t addr);
>  void cpu_sh4_write_mmaped_itlb_addr(CPUSH4State *s, target_phys_addr_t addr,
[...]

Patch

diff --git a/hw/sh7750.c b/hw/sh7750.c
index 23950aa..ca7839e 100644
--- a/hw/sh7750.c
+++ b/hw/sh7750.c
@@ -406,7 +406,7 @@  static void sh7750_mem_writel(void *opaque, target_phys_addr_t addr,
 	return;
     case SH7750_MMUCR_A7:
         if (mem_value & MMUCR_TI) {
-            cpu_sh4_invalidate_tlb(&s->cpu->env);
+            cpu_sh4_invalidate_tlb(s->cpu);
         }
         s->cpu->env.mmucr = mem_value & ~MMUCR_TI;
         return;
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index ee8ba5e..32e59e7 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -186,6 +186,8 @@  typedef struct CPUSH4State {
     memory_content **movcal_backup_tail;
 } CPUSH4State;
 
+typedef struct SuperHCPU SuperHCPU;
+
 CPUSH4State *cpu_sh4_init(const char *cpu_model);
 int cpu_sh4_exec(CPUSH4State * s);
 int cpu_sh4_signal_handler(int host_signum, void *pinfo,
@@ -197,7 +199,7 @@  void do_interrupt(CPUSH4State * env);
 
 void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf);
 #if !defined(CONFIG_USER_ONLY)
-void cpu_sh4_invalidate_tlb(CPUSH4State *s);
+void cpu_sh4_invalidate_tlb(SuperHCPU *cpu);
 uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s,
                                        target_phys_addr_t addr);
 void cpu_sh4_write_mmaped_itlb_addr(CPUSH4State *s, target_phys_addr_t addr,
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index 5c57380..655faaa 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -555,22 +555,22 @@  void cpu_load_tlb(CPUSH4State * env)
     entry->tc   = (uint8_t)cpu_ptea_tc(env->ptea);
 }
 
- void cpu_sh4_invalidate_tlb(CPUSH4State *s)
+void cpu_sh4_invalidate_tlb(SuperHCPU *cpu)
 {
     int i;
 
     /* UTLB */
     for (i = 0; i < UTLB_SIZE; i++) {
-        tlb_t * entry = &s->utlb[i];
+        tlb_t *entry = &cpu->env.utlb[i];
         entry->v = 0;
     }
     /* ITLB */
     for (i = 0; i < ITLB_SIZE; i++) {
-        tlb_t * entry = &s->itlb[i];
+        tlb_t *entry = &cpu->env.itlb[i];
         entry->v = 0;
     }
 
-    tlb_flush(s, 1);
+    tlb_flush(&cpu->env, 1);
 }
 
 uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s,