Patchwork [v3] KVM: PPC: bookehv: Fix save/restore of guest accessible SPRGs.

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Submitter Varun Sethi
Date April 13, 2012, 5:39 p.m.
Message ID <1334338798-5559-1-git-send-email-Varun.Sethi@freescale.com>
Download mbox | patch
Permalink /patch/152360/
State New
Headers show

Comments

Varun Sethi - April 13, 2012, 5:39 p.m.
For Guest accessible SPRGs 4-7, save/restore must be handled differently for 64bit and
non-64 bit case. The registers are maintained as 64 bit copies by KVM. While saving/restoring
for the non-64 bit case we should always take the lower 4 bytes.

Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
---
 arch/powerpc/kvm/bookehv_interrupts.S |   24 ++++++++++++++++--------
 1 files changed, 16 insertions(+), 8 deletions(-)

Patch

diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S
index 909e96e..0d04bc9 100644
--- a/arch/powerpc/kvm/bookehv_interrupts.S
+++ b/arch/powerpc/kvm/bookehv_interrupts.S
@@ -40,6 +40,14 @@ 
 #define VCPU_GPR(n)     	(VCPU_GPRS + (n * LONGBYTES))
 #define VCPU_GUEST_SPRG(n)	(VCPU_GUEST_SPRGS + (n * LONGBYTES))
 
+#ifdef CONFIG_64BIT
+#define PPC_STD(sreg, offset, areg)  std sreg, (offset)(areg)
+#define PPC_LD(treg, offset, areg)   ld treg, (offset)(areg)
+#else
+#define PPC_STD(sreg, offset, areg)  stw sreg, (offset+4)(areg)
+#define PPC_LD(treg, offset, areg)   lwz treg, (offset+4)(areg)
+#endif
+
 /* The host stack layout: */
 #define HOST_R1         (0 * LONGBYTES) /* Implied by stwu. */
 #define HOST_CALLEE_LR  (1 * LONGBYTES)
@@ -320,13 +328,13 @@  _GLOBAL(kvmppc_resume_host)
 	PPC_STL	r5, VCPU_LR(r4)
 	mfspr	r7, SPRN_SPRG5
 	PPC_STL	r3, VCPU_VRSAVE(r4)
-	PPC_STL	r6, VCPU_SHARED_SPRG4(r11)
+	PPC_STD(r6, VCPU_SHARED_SPRG4, r11)
 	mfspr	r8, SPRN_SPRG6
-	PPC_STL	r7, VCPU_SHARED_SPRG5(r11)
+	PPC_STD(r7, VCPU_SHARED_SPRG5, r11)
 	mfspr	r9, SPRN_SPRG7
-	PPC_STL	r8, VCPU_SHARED_SPRG6(r11)
+	PPC_STD(r8, VCPU_SHARED_SPRG6, r11)
 	mfxer	r3
-	PPC_STL	r9, VCPU_SHARED_SPRG7(r11)
+	PPC_STD(r9, VCPU_SHARED_SPRG7, r11)
 
 	/* save guest MAS registers and restore host mas4 & mas6 */
 	mfspr	r5, SPRN_MAS0
@@ -549,13 +557,13 @@  lightweight_exit:
 	 * SPRGs, so we need to reload them here with the guest's values.
 	 */
 	lwz	r3, VCPU_VRSAVE(r4)
-	lwz	r5, VCPU_SHARED_SPRG4(r11)
+	PPC_LD(r5, VCPU_SHARED_SPRG4, r11)
 	mtspr	SPRN_VRSAVE, r3
-	lwz	r6, VCPU_SHARED_SPRG5(r11)
+	PPC_LD(r6, VCPU_SHARED_SPRG5, r11)
 	mtspr	SPRN_SPRG4W, r5
-	lwz	r7, VCPU_SHARED_SPRG6(r11)
+	PPC_LD(r7, VCPU_SHARED_SPRG6, r11)
 	mtspr	SPRN_SPRG5W, r6
-	lwz	r8, VCPU_SHARED_SPRG7(r11)
+	PPC_LD(r8, VCPU_SHARED_SPRG7, r11)
 	mtspr	SPRN_SPRG6W, r7
 	mtspr	SPRN_SPRG7W, r8