From patchwork Thu Apr 12 08:13:01 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evgeny Voevodin X-Patchwork-Id: 151998 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B7837B7040 for ; Thu, 12 Apr 2012 18:14:07 +1000 (EST) Received: from localhost ([::1]:41029 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SIFAL-0006H2-Am for incoming@patchwork.ozlabs.org; Thu, 12 Apr 2012 04:14:05 -0400 Received: from eggs.gnu.org ([208.118.235.92]:43801) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SIF9k-0004wx-LQ for qemu-devel@nongnu.org; Thu, 12 Apr 2012 04:13:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SIF9a-00007y-Ny for qemu-devel@nongnu.org; Thu, 12 Apr 2012 04:13:28 -0400 Received: from mailout2.w1.samsung.com ([210.118.77.12]:47633) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SIF9a-00007A-Hm for qemu-devel@nongnu.org; Thu, 12 Apr 2012 04:13:18 -0400 Received: from euspt1 (mailout2.w1.samsung.com [210.118.77.12]) by mailout2.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTP id <0M2C00142XHZF3@mailout2.w1.samsung.com> for qemu-devel@nongnu.org; Thu, 12 Apr 2012 09:13:11 +0100 (BST) Received: from evvoevodinPC.rnd.samsung.ru ([106.109.9.191]) by spt1.w1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0M2C001BZXHW60@spt1.w1.samsung.com> for qemu-devel@nongnu.org; Thu, 12 Apr 2012 09:13:15 +0100 (BST) Date: Thu, 12 Apr 2012 12:13:01 +0400 From: Evgeny Voevodin In-reply-to: <1334218381-4208-1-git-send-email-e.voevodin@samsung.com> To: qemu-devel@nongnu.org Message-id: <1334218381-4208-3-git-send-email-e.voevodin@samsung.com> MIME-version: 1.0 X-Mailer: git-send-email 1.7.5.4 Content-type: TEXT/PLAIN Content-transfer-encoding: 7BIT References: <1334218381-4208-1-git-send-email-e.voevodin@samsung.com> X-detected-operating-system: by eggs.gnu.org: Solaris 9.1 X-Received-From: 210.118.77.12 Cc: peter.maydell@linaro.org, i.mitsyanko@samsung.com, Evgeny Voevodin , kyungmin.park@samsung.com, d.solodkiy@samsung.com, m.kozlov@samsung.com Subject: [Qemu-devel] [PATCH v2 2/2] hw/exynos4210_gic.c: Introduce n_in and n_out propeties. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org With these properties irq gate could be tuned to mux up to QDEV_MAX_IRQ inputs and ouputs. Gate will group inputs into groups of size n_in/n_out each. Signed-off-by: Evgeny Voevodin --- hw/exynos4210.c | 2 + hw/exynos4210_gic.c | 69 +++++++++++++++++++++++++++++++------------------- 2 files changed, 45 insertions(+), 26 deletions(-) diff --git a/hw/exynos4210.c b/hw/exynos4210.c index 5e30387..2cb7890 100644 --- a/hw/exynos4210.c +++ b/hw/exynos4210.c @@ -98,6 +98,8 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem, /* IRQ Gate */ dev = qdev_create(NULL, "exynos4210.irq_gate"); + qdev_prop_set_uint32(dev, "n_out", EXYNOS4210_NCPUS); + qdev_prop_set_uint32(dev, "n_in", EXYNOS4210_IRQ_GATE_NINPUTS); qdev_init_nofail(dev); /* Get IRQ Gate input in gate_irq */ for (n = 0; n < EXYNOS4210_IRQ_GATE_NINPUTS; n++) { diff --git a/hw/exynos4210_gic.c b/hw/exynos4210_gic.c index ec13140..be95fe4 100644 --- a/hw/exynos4210_gic.c +++ b/hw/exynos4210_gic.c @@ -361,18 +361,29 @@ type_init(exynos4210_gic_register_types) typedef struct { SysBusDevice busdev; - qemu_irq pic_irq[NCPU]; /* output IRQs to PICs */ - uint32_t gpio_level[EXYNOS4210_IRQ_GATE_NINPUTS]; /* Input levels */ + qemu_irq out[QDEV_MAX_IRQ]; /* output IRQs */ + uint32_t n_out; /* outputs amount */ + uint32_t gpio_level[QDEV_MAX_IRQ]; /* Input levels */ + uint32_t n_in; /* inputs amount */ + uint32_t group_size; /* input group size */ } Exynos4210IRQGateState; +static Property exynos4210_irq_gate_properties[] = { + DEFINE_PROP_UINT32("n_out", Exynos4210IRQGateState, n_out, 1), + DEFINE_PROP_UINT32("n_in", Exynos4210IRQGateState, n_in, 1), + DEFINE_PROP_END_OF_LIST(), +}; + static const VMStateDescription vmstate_exynos4210_irq_gate = { .name = "exynos4210.irq_gate", - .version_id = 1, - .minimum_version_id = 1, - .minimum_version_id_old = 1, + .version_id = 2, + .minimum_version_id = 2, + .minimum_version_id_old = 2, .fields = (VMStateField[]) { - VMSTATE_UINT32_ARRAY(gpio_level, Exynos4210IRQGateState, - EXYNOS4210_IRQ_GATE_NINPUTS), + VMSTATE_UINT32(n_out, Exynos4210IRQGateState), + VMSTATE_UINT32_ARRAY(gpio_level, Exynos4210IRQGateState, QDEV_MAX_IRQ), + VMSTATE_UINT32(n_in, Exynos4210IRQGateState), + VMSTATE_UINT32(group_size, Exynos4210IRQGateState), VMSTATE_END_OF_LIST() } }; @@ -382,25 +393,24 @@ static void exynos4210_irq_gate_handler(void *opaque, int irq, int level) { Exynos4210IRQGateState *s = (Exynos4210IRQGateState *)opaque; - uint32_t odd, even; - - if (irq & 1) { - odd = irq; - even = irq & ~1; - } else { - even = irq; - odd = irq | 1; - } + uint32_t n_out, n_group, i; + + assert(irq < s->n_in); + + n_out = irq / s->group_size; + n_group = n_out * s->group_size; - assert(irq < EXYNOS4210_IRQ_GATE_NINPUTS); s->gpio_level[irq] = level; - if (s->gpio_level[odd] >= 1 || s->gpio_level[even] >= 1) { - qemu_irq_raise(s->pic_irq[even >> 1]); - } else { - qemu_irq_lower(s->pic_irq[even >> 1]); + for (i = 0; i < s->group_size; i++) { + if (s->gpio_level[n_group + i] >= 1) { + qemu_irq_raise(s->out[n_out]); + return; + } } + qemu_irq_lower(s->out[n_out]); + return; } @@ -420,14 +430,20 @@ static int exynos4210_irq_gate_init(SysBusDevice *dev) Exynos4210IRQGateState *s = FROM_SYSBUS(Exynos4210IRQGateState, dev); + /* Gate will make each input group of size n_in / n_out */ + if ((s->n_in % s->n_out) != 0) { + hw_error("n_in is not multiple of n_out in Irq Gate"); + } + + s->group_size = s->n_in / s->n_out; + /* Allocate general purpose input signals and connect a handler to each of * them */ - qdev_init_gpio_in(&s->busdev.qdev, exynos4210_irq_gate_handler, - EXYNOS4210_IRQ_GATE_NINPUTS); + qdev_init_gpio_in(&s->busdev.qdev, exynos4210_irq_gate_handler, s->n_in); - /* Connect SysBusDev irqs to device specific irqs */ - for (i = 0; i < NCPU; i++) { - sysbus_init_irq(dev, &s->pic_irq[i]); + /* Pass gate outs to SysBusDev */ + for (i = 0; i < s->n_out; i++) { + sysbus_init_irq(dev, &s->out[i]); } return 0; @@ -441,6 +457,7 @@ static void exynos4210_irq_gate_class_init(ObjectClass *klass, void *data) k->init = exynos4210_irq_gate_init; dc->reset = exynos4210_irq_gate_reset; dc->vmsd = &vmstate_exynos4210_irq_gate; + dc->props = exynos4210_irq_gate_properties; } static TypeInfo exynos4210_irq_gate_info = {