diff mbox

[powerpc] Fix PR52775, enable FCFID on power4

Message ID 20120411201203.GA18022@ibm-tiger.the-meissners.org
State New
Headers show

Commit Message

Michael Meissner April 11, 2012, 8:12 p.m. UTC 
It was brought to my attention that when I rewrote the floating point
conversion operations for power7, I did not notice that the power4 and 970
powerpc's actually support the FCFID (floating point convert) instruciton in
32-bit mode.  This patch fixes it.  It is ok to apply?  I did bootstraps with
and without the patch, and there were no regressions.

[gcc]
2012-04-11  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/52775
	* config/rs6000/rs6000.h (TARGET_FCFID): Add TARGET_PPC_GPOPT to
	the list of options to enable the FCFID instruction.
	(TARGET_EXTRA_BUILTINS): Adjust comment.

[gcc/testsuite]
2012-04-11  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/52775
	* gcc.target/powerpc/pr52775.c: New file.

Comments

David Edelsohn April 12, 2012, 3:23 p.m. UTC | #1 
On Wed, Apr 11, 2012 at 4:12 PM, Michael Meissner
<meissner@linux.vnet.ibm.com> wrote:
> It was brought to my attention that when I rewrote the floating point
> conversion operations for power7, I did not notice that the power4 and 970
> powerpc's actually support the FCFID (floating point convert) instruciton in
> 32-bit mode.  This patch fixes it.  It is ok to apply?  I did bootstraps with
> and without the patch, and there were no regressions.
>
> [gcc]
> 2012-04-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
>
>        PR target/52775
>        * config/rs6000/rs6000.h (TARGET_FCFID): Add TARGET_PPC_GPOPT to
>        the list of options to enable the FCFID instruction.
>        (TARGET_EXTRA_BUILTINS): Adjust comment.
>
> [gcc/testsuite]
> 2012-04-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
>
>        PR target/52775
>        * gcc.target/powerpc/pr52775.c: New file.

Okay.

Thanks, David
diff mbox

Patch

Index: gcc/config/rs6000/rs6000.h
===================================================================
--- gcc/config/rs6000/rs6000.h	(revision 186326)
+++ gcc/config/rs6000/rs6000.h	(working copy)
@@ -467,10 +467,11 @@  extern int rs6000_vector_align[];
 /* ISA 2.01 allowed FCFID to be done in 32-bit, previously it was 64-bit only.
    Enable 32-bit fcfid's on any of the switches for newer ISA machines or
    XILINX.  */
-#define TARGET_FCFID	(TARGET_POWERPC64 \
-			 || TARGET_POPCNTB	/* ISA 2.02 */ \
-			 || TARGET_CMPB		/* ISA 2.05 */ \
-			 || TARGET_POPCNTD	/* ISA 2.06 */ \
+#define TARGET_FCFID	(TARGET_POWERPC64				\
+			 || TARGET_PPC_GPOPT	/* 970/power4 */	\
+			 || TARGET_POPCNTB	/* ISA 2.02 */		\
+			 || TARGET_CMPB		/* ISA 2.05 */		\
+			 || TARGET_POPCNTD	/* ISA 2.06 */		\
 			 || TARGET_XILINX_FPU)
 
 #define TARGET_FCTIDZ	TARGET_FCFID
@@ -492,7 +493,7 @@  extern int rs6000_vector_align[];
 
 #define TARGET_EXTRA_BUILTINS	(!TARGET_SPE && !TARGET_PAIRED_FLOAT	 \
 				 && ((TARGET_POWERPC64			 \
-				      || TARGET_PPC_GPOPT /* 970 */	 \
+				      || TARGET_PPC_GPOPT /* 970/power4 */ \
 				      || TARGET_POPCNTB	  /* ISA 2.02 */ \
 				      || TARGET_CMPB	  /* ISA 2.05 */ \
 				      || TARGET_POPCNTD	  /* ISA 2.06 */ \
Index: gcc/testsuite/gcc.target/powerpc/pr52775.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr52775.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/pr52775.c	(revision 0)
@@ -0,0 +1,16 @@ 
+/* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
+/* { dg-options "-O1 -mcpu=power4" } */
+/* { dg-final { scan-assembler-times "fcfid" 2 } } */
+
+double
+int_to_double (int *p)
+{
+  return (double)*p;
+}
+
+double
+long_long_to_double (long long *p)
+{
+  return (double)*p;
+}