===================================================================
@@ -0,0 +1,30 @@
+/* Check that the mov.w displacement addressing insn is generated.
+ If the insn is generated as expected, there should be no address
+ calculations outside the mov insns. */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
+/* { dg-final { scan-assembler-not "add|sub" } } */
+
+void
+testfunc_00 (const short* ap, short* bp, short val)
+{
+ bp[0] = ap[15];
+ bp[2] = ap[5];
+ bp[9] = ap[7];
+ bp[0] = ap[15];
+ bp[4] = val;
+ bp[14] = val;
+}
+
+void
+testfunc_01 (volatile const short* ap, volatile short* bp, short val)
+{
+ bp[0] = ap[15];
+ bp[2] = ap[5];
+ bp[9] = ap[7];
+ bp[0] = ap[15];
+ bp[4] = val;
+ bp[14] = val;
+}
+
===================================================================
@@ -0,0 +1,27 @@
+/* Check that the mov.w displacement addressing insn is generated and the
+ base address is adjusted only once. On SH2A this test is skipped because
+ there is a 4 byte mov.w insn that can handle larger displacements. Thus
+ on SH2A the base address will not be adjusted in this case. */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" "-m2a*" } { "" } } */
+/* { dg-final { scan-assembler-times "add" 2 } } */
+
+void
+testfunc_00 (const short* ap, short* bp)
+{
+ bp[0] = ap[15];
+ bp[2] = ap[5];
+ bp[9] = ap[7];
+ bp[0] = ap[25];
+}
+
+void
+testfunc_01 (volatile const short* ap, volatile short* bp)
+{
+ bp[0] = ap[15];
+ bp[2] = ap[5];
+ bp[9] = ap[7];
+ bp[0] = ap[25];
+}
+
===================================================================
@@ -0,0 +1,26 @@
+/* Check that on SH2A the 4 byte mov.w displacement insn is generated to
+ handle larger displacements. If it is generated correctly, there should
+ be no base address adjustments outside the mov.w insns. */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m2a*" } } */
+/* { dg-final { scan-assembler-not "add|sub" } } */
+
+void
+testfunc_00 (const short* ap, short* bp)
+{
+ bp[100] = ap[15];
+ bp[200] = ap[50];
+ bp[900] = ap[71];
+ bp[0] = ap[25];
+}
+
+void
+testfunc_01 (volatile const short* ap, volatile short* bp)
+{
+ bp[100] = ap[15];
+ bp[200] = ap[50];
+ bp[900] = ap[71];
+ bp[0] = ap[25];
+}
+
===================================================================
@@ -0,0 +1,35 @@
+/* Check that mov.b and mov.w displacement insns are generated.
+ If this is working properly, there should be no base address adjustments
+ outside the mov insns. */
+/* { dg-do compile { target "sh*-*-*" } } */
+/* { dg-options "-O1" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
+/* { dg-final { scan-assembler-not "add|sub" } } */
+
+typedef struct
+{
+ char a;
+ char b;
+ char c;
+ char d;
+
+ short e;
+ short f;
+
+ int g;
+ int h;
+} X;
+
+void
+testfunc_00 (X* x)
+{
+ x->g = x->b | x->c;
+ x->h = x->e | x->f;
+ x->d = x->g;
+ x->f = x->h;
+}
+
+int testfunc_01 (X* x)
+{
+ return x->b | x->e | x->g;
+}
Hi, The attached patch adds some more test cases for PR 50751. Tested on sh-sim with make check-gcc RUNTESTFLAGS="sh.exp=pr50751* --target_board=sh-sim \{-m2/-ml,-m2/-mb,-m2a-single/-mb,-m4-single/-ml, -m4-single/-mb,-m4a-single/-ml,-m4a-single/-mb}" to confirm that the tests pass as expected. OK? Cheers, Oleg testsuite/ChangeLog: PR target/50751 * gcc/target/sh/pr50751-4.c: New. * gcc/target/sh/pr50751-5.c: New. * gcc/target/sh/pr50751-6.c: New. * gcc/target/sh/pr50751-7.c: New.