Patchwork [U-Boot] i.mx: i.mx6x: NO_MUX_I/NO_PAD_I not set correctly

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Submitter Jason Liu
Date April 11, 2012, 11:18 a.m.
Message ID <1334143082-7876-1-git-send-email-jason.hui@linaro.org>
Download mbox | patch
Permalink /patch/151761/
State Accepted
Commit 0d952e5d2eef9320338a87007959ce0d80a264e3
Headers show

Comments

Jason Liu - April 11, 2012, 11:18 a.m.
If one PAD does not have mux or pad config register, we need
set the NO_MUX_I/NO_PAD_I to 0, the old value is not correct

Signed-off-by: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
---
 arch/arm/include/asm/arch-mx6/mx6x_pins.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
Stefano Babic - April 11, 2012, 11:58 a.m.
On 11/04/2012 13:18, Jason Liu wrote:
> If one PAD does not have mux or pad config register, we need
> set the NO_MUX_I/NO_PAD_I to 0, the old value is not correct
> 
> Signed-off-by: Jason Liu <jason.hui@linaro.org>
> CC: Stefano Babic <sbabic@denx.de>
> ---
>  arch/arm/include/asm/arch-mx6/mx6x_pins.h |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-mx6/mx6x_pins.h b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
> index afaa068..9979651 100644
> --- a/arch/arm/include/asm/arch-mx6/mx6x_pins.h
> +++ b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
> @@ -48,8 +48,8 @@
>  #define PAD_CTL_SRE_FAST	(1 << 0)
>  #define PAD_CTL_SRE_SLOW	(0 << 0)
>  
> -#define NO_MUX_I		0x3FF
> -#define NO_PAD_I		0x7FF
> +#define NO_MUX_I                0
> +#define NO_PAD_I                0
>  
>  enum {
>  	MX6Q_PAD_SD2_DAT1__USDHC2_DAT1		= IOMUX_PAD(0x0360, 0x004C, 0, 0x0000, 0, 0),

Agree. Please correct me if I am wrong, but with these changes we should
sure that the iomux register are not set if we do not want, because in
imx_iomux_v3_setup_pad:

if (sel_input_ofs)
	__raw_writel(sel_input, base + sel_input_ofs);

and NO_MUX_I = 0 should set sel_input_ofs to 0.

It is then difficult to understand why we have up now 0x3FF as value,
but it neverminds..

Acked-by: Stefano Babic <sbabic@denx.de>

(This is a fix, I will merge it for the release)

Best regards,
Stefano Babic
Dirk Behme - May 15, 2012, 12:42 p.m.
On 11.04.2012 13:58, Stefano Babic wrote:
> On 11/04/2012 13:18, Jason Liu wrote:
>> If one PAD does not have mux or pad config register, we need
>> set the NO_MUX_I/NO_PAD_I to 0, the old value is not correct
>>
>> Signed-off-by: Jason Liu <jason.hui@linaro.org>
>> CC: Stefano Babic <sbabic@denx.de>
>> ---
>>  arch/arm/include/asm/arch-mx6/mx6x_pins.h |    4 ++--
>>  1 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/include/asm/arch-mx6/mx6x_pins.h b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
>> index afaa068..9979651 100644
>> --- a/arch/arm/include/asm/arch-mx6/mx6x_pins.h
>> +++ b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
>> @@ -48,8 +48,8 @@
>>  #define PAD_CTL_SRE_FAST	(1 << 0)
>>  #define PAD_CTL_SRE_SLOW	(0 << 0)
>>  
>> -#define NO_MUX_I		0x3FF
>> -#define NO_PAD_I		0x7FF
>> +#define NO_MUX_I                0
>> +#define NO_PAD_I                0
>>  
>>  enum {
>>  	MX6Q_PAD_SD2_DAT1__USDHC2_DAT1		= IOMUX_PAD(0x0360, 0x004C, 0, 0x0000, 0, 0),
> 
> Agree. Please correct me if I am wrong, but with these changes we should
> sure that the iomux register are not set if we do not want, because in
> imx_iomux_v3_setup_pad:
> 
> if (sel_input_ofs)
> 	__raw_writel(sel_input, base + sel_input_ofs);
> 
> and NO_MUX_I = 0 should set sel_input_ofs to 0.
> 
> It is then difficult to understand why we have up now 0x3FF as value,
> but it neverminds..
> 
> Acked-by: Stefano Babic <sbabic@denx.de>
> 
> (This is a fix, I will merge it for the release)

I have this patch on my list of pending patches.

Should it be applied now?

Best regards

Dirk
Stefano Babic - June 12, 2012, 5:05 p.m.
On 11/04/2012 13:18, Jason Liu wrote:
> If one PAD does not have mux or pad config register, we need
> set the NO_MUX_I/NO_PAD_I to 0, the old value is not correct
> 
> Signed-off-by: Jason Liu <jason.hui@linaro.org>
> CC: Stefano Babic <sbabic@denx.de>
> ---
>  arch/arm/include/asm/arch-mx6/mx6x_pins.h |    4 ++--
>  1 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-mx6/mx6x_pins.h b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
> index afaa068..9979651 100644
> --- a/arch/arm/include/asm/arch-mx6/mx6x_pins.h
> +++ b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
> @@ -48,8 +48,8 @@
>  #define PAD_CTL_SRE_FAST	(1 << 0)
>  #define PAD_CTL_SRE_SLOW	(0 << 0)
>  
> -#define NO_MUX_I		0x3FF
> -#define NO_PAD_I		0x7FF
> +#define NO_MUX_I                0
> +#define NO_PAD_I                0
>  
>  enum {
>  	MX6Q_PAD_SD2_DAT1__USDHC2_DAT1		= IOMUX_PAD(0x0360, 0x004C, 0, 0x0000, 0, 0),

Applied to u-boot-imx, thanks. Sorry that it was not applied before ;-)

Best regards,
Stefano Babic

Patch

diff --git a/arch/arm/include/asm/arch-mx6/mx6x_pins.h b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
index afaa068..9979651 100644
--- a/arch/arm/include/asm/arch-mx6/mx6x_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
@@ -48,8 +48,8 @@ 
 #define PAD_CTL_SRE_FAST	(1 << 0)
 #define PAD_CTL_SRE_SLOW	(0 << 0)
 
-#define NO_MUX_I		0x3FF
-#define NO_PAD_I		0x7FF
+#define NO_MUX_I                0
+#define NO_PAD_I                0
 
 enum {
 	MX6Q_PAD_SD2_DAT1__USDHC2_DAT1		= IOMUX_PAD(0x0360, 0x004C, 0, 0x0000, 0, 0),