From patchwork Tue Apr 10 20:04:23 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Meador Inge X-Patchwork-Id: 151689 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 09947B7061 for ; Wed, 11 Apr 2012 06:04:44 +1000 (EST) Received: from localhost ([::1]:47266 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SHhIv-0004av-Tw for incoming@patchwork.ozlabs.org; Tue, 10 Apr 2012 16:04:41 -0400 Received: from eggs.gnu.org ([208.118.235.92]:56284) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SHhIp-0004aS-5R for qemu-devel@nongnu.org; Tue, 10 Apr 2012 16:04:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SHhIn-0004mb-Dv for qemu-devel@nongnu.org; Tue, 10 Apr 2012 16:04:34 -0400 Received: from relay1.mentorg.com ([192.94.38.131]:62394) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SHhIk-0004ir-7f; Tue, 10 Apr 2012 16:04:30 -0400 Received: from svr-orw-fem-01.mgc.mentorg.com ([147.34.98.93]) by relay1.mentorg.com with esmtp id 1SHhIe-0005zK-Pn from meador_inge@mentor.com ; Tue, 10 Apr 2012 13:04:24 -0700 Received: from SVR-ORW-FEM-03.mgc.mentorg.com ([147.34.97.39]) by svr-orw-fem-01.mgc.mentorg.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Tue, 10 Apr 2012 13:04:24 -0700 Received: from dhalsim.gateway.2wire.net (147.34.91.1) by svr-orw-fem-03.mgc.mentorg.com (147.34.97.39) with Microsoft SMTP Server id 14.1.289.1; Tue, 10 Apr 2012 13:04:23 -0700 From: Meador Inge To: Date: Tue, 10 Apr 2012 15:04:23 -0500 Message-ID: <1334088263-10530-1-git-send-email-meadori@codesourcery.com> X-Mailer: git-send-email 1.7.7.6 MIME-Version: 1.0 X-OriginalArrivalTime: 10 Apr 2012 20:04:24.0436 (UTC) FILETIME=[20405B40:01CD1755] X-detected-operating-system: by eggs.gnu.org: Solaris 10 (beta) X-Received-From: 192.94.38.131 Cc: qemu-ppc@nongnu.org, agraf@suse.de Subject: [Qemu-devel] [PATCH] target-ppc: Init dcache and icache size for e500 user mode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org commit f7aa558396dd0f6b7a2b22c05cb503c655854102 pulled the dcache and icache line size initialization inside of a '#if !defined(CONFIG_USER_ONLY)' block. This is not correct because instructions like 'dcbz' need the dcache size initialized even for user mode. Signed-off-by: Meador Inge Reviewed-by: Andreas Färber --- target-ppc/translate_init.c | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index b1f8785..ef8735a 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -4466,25 +4466,32 @@ static void init_proc_e500 (CPUPPCState *env, int version) env->nb_pids = 3; env->nb_ways = 2; env->id_tlbs = 0; +#endif switch (version) { case fsl_e500v1: /* e500v1 */ +#if !defined(CONFIG_USER_ONLY) tlbncfg[0] = gen_tlbncfg(2, 1, 1, 0, 256); tlbncfg[1] = gen_tlbncfg(16, 1, 9, TLBnCFG_AVAIL | TLBnCFG_IPROT, 16); +#endif env->dcache_line_size = 32; env->icache_line_size = 32; break; case fsl_e500v2: /* e500v2 */ +#if !defined(CONFIG_USER_ONLY) tlbncfg[0] = gen_tlbncfg(4, 1, 1, 0, 512); tlbncfg[1] = gen_tlbncfg(16, 1, 12, TLBnCFG_AVAIL | TLBnCFG_IPROT, 16); +#endif env->dcache_line_size = 32; env->icache_line_size = 32; break; case fsl_e500mc: /* e500mc */ +#if !defined(CONFIG_USER_ONLY) tlbncfg[0] = gen_tlbncfg(4, 1, 1, 0, 512); tlbncfg[1] = gen_tlbncfg(64, 1, 12, TLBnCFG_AVAIL | TLBnCFG_IPROT, 64); +#endif env->dcache_line_size = 64; env->icache_line_size = 64; l1cfg0 |= 0x1000000; /* 64 byte cache block size */ @@ -4492,7 +4499,6 @@ static void init_proc_e500 (CPUPPCState *env, int version) default: cpu_abort(env, "Unknown CPU: " TARGET_FMT_lx "\n", env->spr[SPR_PVR]); } -#endif gen_spr_BookE206(env, 0x000000DF, tlbncfg); /* XXX : not implemented */ spr_register(env, SPR_HID0, "HID0",