From patchwork Tue Apr 10 13:45:41 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 151575 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2D99DB7019 for ; Tue, 10 Apr 2012 23:58:12 +1000 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SHbY9-0007jj-OV; Tue, 10 Apr 2012 13:56:01 +0000 Received: from 173-166-109-252-newengland.hfc.comcastbusiness.net ([173.166.109.252] helo=bombadil.infradead.org) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1SHbP0-0005s9-Ob for linux-arm-kernel@merlin.infradead.org; Tue, 10 Apr 2012 13:46:34 +0000 Received: from metis.ext.pengutronix.de ([2001:6f8:1178:4:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1SHbOy-0001pf-Md for linux-arm-kernel@lists.infradead.org; Tue, 10 Apr 2012 13:46:33 +0000 Received: from dude.hi.pengutronix.de ([2001:6f8:1178:2:21e:67ff:fe11:9c5c]) by metis.ext.pengutronix.de with esmtp (Exim 4.72) (envelope-from ) id 1SHbOc-0005i9-Cw; Tue, 10 Apr 2012 15:46:10 +0200 Received: from sha by dude.hi.pengutronix.de with local (Exim 4.77) (envelope-from ) id 1SHbOb-0003Cw-N4; Tue, 10 Apr 2012 15:46:09 +0200 From: Sascha Hauer To: Subject: [PATCH 28/40] ARM i.MX1: implement clocks using common clock framework Date: Tue, 10 Apr 2012 15:45:41 +0200 Message-Id: <1334065553-7565-29-git-send-email-s.hauer@pengutronix.de> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1334065553-7565-1-git-send-email-s.hauer@pengutronix.de> References: <1334065553-7565-1-git-send-email-s.hauer@pengutronix.de> X-SA-Exim-Connect-IP: 2001:6f8:1178:2:21e:67ff:fe11:9c5c X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20120410_094633_001076_24CD5040 X-CRM114-Status: GOOD ( 17.71 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on bombadil.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Sascha Hauer , Shawn Guo , Fabio Estevam X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/Kconfig | 1 + arch/arm/mach-imx/Makefile | 2 +- arch/arm/mach-imx/clk-imx1.c | 109 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 111 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-imx/clk-imx1.c diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 0b832b1..c03920a 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -34,6 +34,7 @@ config ARCH_MX53 config SOC_IMX1 bool select ARCH_MX1 + select COMMON_CLK select CPU_ARM920T select IMX_HAVE_IOMUX_V1 select MXC_AVIC diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 173e869..52b3af4 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -1,4 +1,4 @@ -obj-$(CONFIG_SOC_IMX1) += clock-imx1.o mm-imx1.o +obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o obj-$(CONFIG_SOC_IMX21) += clock-imx21.o mm-imx21.o obj-$(CONFIG_SOC_IMX25) += clk-imx25.o mm-imx25.o ehci-imx25.o cpu-imx25.o diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c new file mode 100644 index 0000000..60f1801 --- /dev/null +++ b/arch/arm/mach-imx/clk-imx1.c @@ -0,0 +1,109 @@ +/* + * Copyright (C) 2008 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include "clk.h" + +/* CCM register addresses */ +#define IO_ADDR_CCM(off) (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off))) + +#define CCM_CSCR IO_ADDR_CCM(0x0) +#define CCM_MPCTL0 IO_ADDR_CCM(0x4) +#define CCM_SPCTL0 IO_ADDR_CCM(0xc) +#define CCM_PCDR IO_ADDR_CCM(0x20) + +/* SCM register addresses */ +#define IO_ADDR_SCM(off) (MX1_IO_ADDRESS(MX1_SCM_BASE_ADDR + (off))) + +#define SCM_GCCR IO_ADDR_SCM(0xc) + +#define clkdev(d, n, c) \ + { \ + .dev_id = d, \ + .con_id = n, \ + .clkname = c, \ + }, + +static struct clk_lookup lookups[] = { + clkdev(NULL, "dma", "dma_gate") + clkdev("mx1-camera.0", NULL, "csi_gate") + clkdev(NULL, "mma", "mma_gate") + clkdev("imx_udc.0", NULL, "usbd_gate") + clkdev("imx-gpt.0", "per", "per1") + clkdev("imx-gpt.0", "ipg", "hclk") + clkdev("imx1-uart.0", "per", "per1") + clkdev("imx1-uart.0", "ipg", "hclk") + clkdev("imx1-uart.1", "per", "per1") + clkdev("imx1-uart.1", "ipg", "hclk") + clkdev("imx1-uart.2", "per", "per1") + clkdev("imx1-uart.2", "ipg", "hclk") + clkdev("imx-i2c.0", NULL, "hclk") + clkdev("imx1-cspi.0", "per", "per2") + clkdev("imx1-cspi.0", "ipg", "dummy") + clkdev("imx1-cspi.1", "per", "per2") + clkdev("imx1-cspi.1", "ipg", "dummy") + clkdev("imx-mmc.0", NULL, "per2") + clkdev("imx-fb.0", "per", "per2") + clkdev("imx-fb.0", "ipg", "dummy") + clkdev("imx-fb.0", "ahb", "dummy") + clkdev(NULL, "mshc", "hclk") + clkdev(NULL, "ssi", "per3") + clkdev("mxc_rtc.0", NULL, "clk32") + clkdev(NULL, "clko", "clko") +}; + +static char *prem_sel_clks[] = { "clk32_premult", "clk16m", }; +static char *clko_sel_clks[] = { "per1", "hclk", "clk48m", "clk16m", "prem", + "fclk", }; + +int __init mx1_clocks_init(unsigned long fref) +{ + imx_clk_fixed("dummy", 0); + imx_clk_fixed("clk32", fref); + imx_clk_fixed("clk16m_ext", 16000000); + imx_clk_gate("clk16m", "clk16m_ext", CCM_CSCR, 17); + imx_clk_fixed_factor("clk32_premult", "clk32", 512, 1); + imx_clk_mux("prem", CCM_CSCR, 16, 1, prem_sel_clks, ARRAY_SIZE(prem_sel_clks)); + imx_clk_pllv1("mpll", "clk32_premult", CCM_MPCTL0); + imx_clk_pllv1("spll", "prem", CCM_SPCTL0); + imx_clk_divider("mcu", "clk32_premult", CCM_CSCR, 15, 1); + imx_clk_divider("fclk", "mpll", CCM_CSCR, 15, 1); + imx_clk_divider("hclk", "spll", CCM_CSCR, 10, 4); + imx_clk_divider("clk48m", "spll", CCM_CSCR, 26, 3); + imx_clk_divider("per1", "spll", CCM_PCDR, 0, 4); + imx_clk_divider("per2", "spll", CCM_PCDR, 4, 4); + imx_clk_divider("per3", "spll", CCM_PCDR, 16, 7); + imx_clk_mux("clko", CCM_CSCR, 29, 3, clko_sel_clks, ARRAY_SIZE(clko_sel_clks)); + imx_clk_gate("dma_gate", "hclk", SCM_GCCR, 4); + imx_clk_gate("csi_gate", "hclk", SCM_GCCR, 2); + imx_clk_gate("mma_gate", "hclk", SCM_GCCR, 1); + imx_clk_gate("usbd_gate", "clk48m", SCM_GCCR, 0); + + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); + + mxc_timer_init(NULL, MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), + MX1_TIM1_INT); + + return 0; +}