From patchwork Fri Apr 6 16:17:09 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 151207 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2DB02B707A for ; Sat, 7 Apr 2012 02:19:26 +1000 (EST) Received: from localhost ([::1]:48395 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SGBsh-0004nR-LU for incoming@patchwork.ozlabs.org; Fri, 06 Apr 2012 12:19:23 -0400 Received: from eggs.gnu.org ([208.118.235.92]:40749) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SGBrA-0000ra-Ls for qemu-devel@nongnu.org; Fri, 06 Apr 2012 12:17:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SGBr5-0000Tu-Be for qemu-devel@nongnu.org; Fri, 06 Apr 2012 12:17:48 -0400 Received: from cantor2.suse.de ([195.135.220.15]:57526 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SGBr5-0000TC-0w; Fri, 06 Apr 2012 12:17:43 -0400 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 6E14DA0DFD; Fri, 6 Apr 2012 18:17:41 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Fri, 6 Apr 2012 18:17:09 +0200 Message-Id: <1333729032-24441-4-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.7 In-Reply-To: <1333729032-24441-1-git-send-email-afaerber@suse.de> References: <1333729032-24441-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: Scott Wood , Alexander Graf , qemu-ppc@nongnu.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= , David Gibson Subject: [Qemu-devel] [PATCH v2 2/5] target-ppc: QOM'ify CPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Embed CPUPPCState as first member of PowerPCCPU. Distinguish between "powerpc-cpu", "powerpc64-cpu" and "embedded-powerpc-cpu". Let CPUClass::reset() call cpu_state_reset() for now. Signed-off-by: Andreas Färber Acked-by: David Gibson --- target-ppc/cpu-qom.h | 77 +++++++++++++++++++++++++++++++++++++++++++ target-ppc/cpu.h | 2 + target-ppc/helper.c | 4 ++- target-ppc/translate_init.c | 37 ++++++++++++++++++++ 4 files changed, 119 insertions(+), 1 deletions(-) create mode 100644 target-ppc/cpu-qom.h diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h new file mode 100644 index 0000000..fef6f95 --- /dev/null +++ b/target-ppc/cpu-qom.h @@ -0,0 +1,77 @@ +/* + * QEMU PowerPC CPU + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see + * + */ +#ifndef QEMU_PPC_CPU_QOM_H +#define QEMU_PPC_CPU_QOM_H + +#include "qemu/cpu.h" +#include "cpu.h" + +#ifdef TARGET_PPC64 +#define TYPE_POWERPC_CPU "powerpc64-cpu" +#elif defined(TARGET_PPCEMB) +#define TYPE_POWERPC_CPU "embedded-powerpc-cpu" +#else +#define TYPE_POWERPC_CPU "powerpc-cpu" +#endif + +#define POWERPC_CPU_CLASS(klass) \ + OBJECT_CLASS_CHECK(PowerPCCPUClass, (klass), TYPE_POWERPC_CPU) +#define POWERPC_CPU(obj) \ + OBJECT_CHECK(PowerPCCPU, (obj), TYPE_POWERPC_CPU) +#define POWERPC_CPU_GET_CLASS(obj) \ + OBJECT_GET_CLASS(PowerPCCPUClass, (obj), TYPE_POWERPC_CPU) + +/** + * PowerPCCPUClass: + * @parent_reset: The parent class' reset handler. + * + * A PowerPC CPU model. + */ +typedef struct PowerPCCPUClass { + /*< private >*/ + CPUClass parent_class; + /*< public >*/ + + void (*parent_reset)(CPUState *cpu); +} PowerPCCPUClass; + +/** + * PowerPCCPU: + * @env: #CPUPPCState + * + * A PowerPC CPU. + */ +typedef struct PowerPCCPU { + /*< private >*/ + CPUState parent_obj; + /*< public >*/ + + CPUPPCState env; +} PowerPCCPU; + +static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env) +{ + return POWERPC_CPU(container_of(env, PowerPCCPU, env)); +} + +#define ENV_GET_CPU(e) CPU(ppc_env_get_cpu(e)) + + +#endif diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index fc70644..7e97b2c 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1096,6 +1096,8 @@ struct mmu_ctx_t { }; #endif +#include "cpu-qom.h" + /*****************************************************************************/ CPUPPCState *cpu_ppc_init (const char *cpu_model); void ppc_translate_init(void); diff --git a/target-ppc/helper.c b/target-ppc/helper.c index 4cd7b0f..fa9494b 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -3186,6 +3186,7 @@ void cpu_state_reset(CPUPPCState *env) CPUPPCState *cpu_ppc_init (const char *cpu_model) { + PowerPCCPU *cpu; CPUPPCState *env; const ppc_def_t *def; @@ -3193,7 +3194,8 @@ CPUPPCState *cpu_ppc_init (const char *cpu_model) if (!def) return NULL; - env = g_malloc0(sizeof(CPUPPCState)); + cpu = POWERPC_CPU(object_new(TYPE_POWERPC_CPU)); + env = &cpu->env; cpu_exec_init(env); if (tcg_enabled()) { ppc_translate_init(); diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 367eefa..24817ef 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -10185,3 +10185,40 @@ void ppc_cpu_list (FILE *f, fprintf_function cpu_fprintf) ppc_defs[i].name, ppc_defs[i].pvr); } } + +/* CPUClass::reset() */ +static void ppc_cpu_reset(CPUState *s) +{ + PowerPCCPU *cpu = POWERPC_CPU(s); + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); + CPUPPCState *env = &cpu->env; + + pcc->parent_reset(s); + + cpu_state_reset(env); +} + +static void ppc_cpu_class_init(ObjectClass *oc, void *data) +{ + PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); + CPUClass *cc = CPU_CLASS(oc); + + pcc->parent_reset = cc->reset; + cc->reset = ppc_cpu_reset; +} + +static const TypeInfo ppc_cpu_type_info = { + .name = TYPE_POWERPC_CPU, + .parent = TYPE_CPU, + .instance_size = sizeof(PowerPCCPU), + .abstract = false, + .class_size = sizeof(PowerPCCPUClass), + .class_init = ppc_cpu_class_init, +}; + +static void ppc_cpu_register_types(void) +{ + type_register_static(&ppc_cpu_type_info); +} + +type_init(ppc_cpu_register_types)