From patchwork Wed Apr 4 23:29:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 150827 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 780F2B7041 for ; Thu, 5 Apr 2012 09:30:21 +1000 (EST) Received: from localhost ([::1]:37378 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SFZeb-0002cv-Gb for incoming@patchwork.ozlabs.org; Wed, 04 Apr 2012 19:30:17 -0400 Received: from eggs.gnu.org ([208.118.235.92]:36116) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SFZeQ-0002Zk-Fx for qemu-devel@nongnu.org; Wed, 04 Apr 2012 19:30:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SFZeK-0005rC-CW for qemu-devel@nongnu.org; Wed, 04 Apr 2012 19:30:05 -0400 Received: from cantor2.suse.de ([195.135.220.15]:45644 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SFZeK-0005r4-2V for qemu-devel@nongnu.org; Wed, 04 Apr 2012 19:30:00 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id D2BE4936F7; Thu, 5 Apr 2012 01:29:57 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Thu, 5 Apr 2012 01:29:40 +0200 Message-Id: <1333582180-9380-3-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.7 In-Reply-To: <1333582180-9380-1-git-send-email-afaerber@suse.de> References: <1333582180-9380-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: Blue Swirl , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [PATCH v2 2/2] target-sparc: QOM'ify CPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Embed CPUSPARCState as first member of SPARCCPU. Drop cpu_sparc_close() in favor of object_delete() and a finalizer. Let cpu_state_reset() call cpu_reset(). Make TYPE_SPARC_CPU non-abstract for now. Distinguish between "sparc-cpu" and "sparc64-cpu". Signed-off-by: Andreas Färber --- target-sparc/cpu-qom.h | 75 ++++++++++++++++++++++++++++++++++++++++++++++++ target-sparc/cpu.c | 68 +++++++++++++++++++++++++++++++++++++------ target-sparc/cpu.h | 1 + 3 files changed, 135 insertions(+), 9 deletions(-) create mode 100644 target-sparc/cpu-qom.h diff --git a/target-sparc/cpu-qom.h b/target-sparc/cpu-qom.h new file mode 100644 index 0000000..3d3ac0f --- /dev/null +++ b/target-sparc/cpu-qom.h @@ -0,0 +1,75 @@ +/* + * QEMU SPARC CPU + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see + * + */ +#ifndef QEMU_SPARC_CPU_QOM_H +#define QEMU_SPARC_CPU_QOM_H + +#include "qemu/cpu.h" +#include "cpu.h" + +#ifdef TARGET_SPARC64 +#define TYPE_SPARC_CPU "sparc64-cpu" +#else +#define TYPE_SPARC_CPU "sparc-cpu" +#endif + +#define SPARC_CPU_CLASS(klass) \ + OBJECT_CLASS_CHECK(SPARCCPUClass, (klass), TYPE_SPARC_CPU) +#define SPARC_CPU(obj) \ + OBJECT_CHECK(SPARCCPU, (obj), TYPE_SPARC_CPU) +#define SPARC_CPU_GET_CLASS(obj) \ + OBJECT_GET_CLASS(SPARCCPUClass, (obj), TYPE_SPARC_CPU) + +/** + * SPARCCPUClass: + * @parent_reset: The parent class' reset handler. + * + * A SPARC CPU model. + */ +typedef struct SPARCCPUClass { + /*< private >*/ + CPUClass parent_class; + /*< public >*/ + + void (*parent_reset)(CPUState *cpu); +} SPARCCPUClass; + +/** + * SPARCCPU: + * @env: #CPUSPARCState + * + * A SPARC CPU. + */ +typedef struct SPARCCPU { + /*< private >*/ + CPUState parent_obj; + /*< public >*/ + + CPUSPARCState env; +} SPARCCPU; + +static inline SPARCCPU *sparc_env_get_cpu(CPUSPARCState *env) +{ + return SPARC_CPU(container_of(env, SPARCCPU, env)); +} + +#define ENV_GET_CPU(e) CPU(sparc_env_get_cpu(e)) + + +#endif diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c index 5c03f0b..24f90f1 100644 --- a/target-sparc/cpu.c +++ b/target-sparc/cpu.c @@ -25,11 +25,23 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model); void cpu_state_reset(CPUSPARCState *env) { + cpu_reset(ENV_GET_CPU(env)); +} + +/* CPUClass::reset() */ +static void sparc_cpu_reset(CPUState *s) +{ + SPARCCPU *cpu = SPARC_CPU(s); + SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(cpu); + CPUSPARCState *env = &cpu->env; + if (qemu_loglevel_mask(CPU_LOG_RESET)) { qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); log_cpu_state(env, 0); } + scc->parent_reset(s); + memset(env, 0, offsetof(CPUSPARCState, breakpoints)); tlb_flush(env, 1); env->cwp = 0; @@ -99,23 +111,18 @@ static int cpu_sparc_register(CPUSPARCState *env, const char *cpu_model) return 0; } -static void cpu_sparc_close(CPUSPARCState *env) -{ - g_free(env->def); - g_free(env); -} - CPUSPARCState *cpu_sparc_init(const char *cpu_model) { + SPARCCPU *cpu; CPUSPARCState *env; - env = g_new0(CPUSPARCState, 1); - cpu_exec_init(env); + cpu = SPARC_CPU(object_new(TYPE_SPARC_CPU)); + env = &cpu->env; gen_intermediate_code_init(env); if (cpu_sparc_register(env, cpu_model) < 0) { - cpu_sparc_close(env); + object_delete(OBJECT(cpu)); return NULL; } qemu_init_vcpu(env); @@ -847,3 +854,46 @@ void cpu_dump_state(CPUSPARCState *env, FILE *f, fprintf_function cpu_fprintf, env->fsr, env->y); #endif } + +static void sparc_cpu_initfn(Object *obj) +{ + SPARCCPU *cpu = SPARC_CPU(obj); + CPUSPARCState *env = &cpu->env; + + cpu_exec_init(env); +} + +static void sparc_cpu_uninitfn(Object *obj) +{ + SPARCCPU *cpu = SPARC_CPU(obj); + CPUSPARCState *env = &cpu->env; + + g_free(env->def); +} + +static void sparc_cpu_class_init(ObjectClass *oc, void *data) +{ + SPARCCPUClass *scc = SPARC_CPU_CLASS(oc); + CPUClass *cc = CPU_CLASS(oc); + + scc->parent_reset = cc->reset; + cc->reset = sparc_cpu_reset; +} + +static const TypeInfo sparc_cpu_type_info = { + .name = TYPE_SPARC_CPU, + .parent = TYPE_CPU, + .instance_size = sizeof(SPARCCPU), + .instance_init = sparc_cpu_initfn, + .instance_finalize = sparc_cpu_uninitfn, + .abstract = false, + .class_size = sizeof(SPARCCPUClass), + .class_init = sparc_cpu_class_init, +}; + +static void sparc_cpu_register_types(void) +{ + type_register_static(&sparc_cpu_type_info); +} + +type_init(sparc_cpu_register_types) diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 885ad45..865288c 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -691,6 +691,7 @@ static inline void cpu_clone_regs(CPUSPARCState *env, target_ulong newsp) #endif #include "cpu-all.h" +#include "cpu-qom.h" #ifdef TARGET_SPARC64 /* sun4u.c */