[14/14] target-arm: Move A9 config_base_address reset value to ARMCPU

Move the A9 config_base_address cp15 register reset value to
ARMCPU. This should become a QOM property so that the Highbank
board can set it without having to pull in cpu-qom.h, but at
least this avoids the implicit dependency on reset ordering
that the previous workaround had.

Cc: Mark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/highbank.c        |   12 +++++-------
 target-arm/cpu-qom.h |    1 +
 target-arm/cpu.c     |    4 +---
 3 files changed, 7 insertions(+), 10 deletions(-)

Odd that I wasn't actually cc'd by the mailer on this.

Do you want me to pull together a patch to make it a QOM property now,
or is there some other dependency I should wait on? It may take me a
week or so to get time to pull it together and test it.

--Mark Langsdorf
Calxeda, Inc.

On 03/30/2012 07:51 AM, Peter Maydell wrote:
> Move the A9 config_base_address cp15 register reset value to
> ARMCPU. This should become a QOM property so that the Highbank
> board can set it without having to pull in cpu-qom.h, but at
> least this avoids the implicit dependency on reset ordering
> that the previous workaround had.
> 
> Cc: Mark Langsdorf <mark.langsdorf@calxeda.com>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  hw/highbank.c        |   12 +++++-------
>  target-arm/cpu-qom.h |    1 +
>  target-arm/cpu.c     |    4 +---
>  3 files changed, 7 insertions(+), 10 deletions(-)
> 
> diff --git a/hw/highbank.c b/hw/highbank.c
> index 906eed5..b007f97 100644
> --- a/hw/highbank.c
> +++ b/hw/highbank.c
> @@ -27,6 +27,7 @@
>  #include "sysbus.h"
>  #include "blockdev.h"
>  #include "exec-memory.h"
> +#include "cpu-qom.h"
>  
>  #define SMP_BOOT_ADDR 0x100
>  #define SMP_BOOT_REG  0x40
> @@ -35,12 +36,6 @@
>  #define NIRQ_GIC      160
>  
>  /* Board init.  */
> -static void highbank_cpu_reset(void *opaque)
> -{
> -    CPUARMState *env = opaque;
> -
> -    env->cp15.c15_config_base_address = GIC_BASE_ADDR;
> -}
>  
>  static void hb_write_secondary(CPUARMState *env, const struct arm_boot_info *info)
>  {
> @@ -213,14 +208,17 @@ static void highbank_init(ram_addr_t ram_size,
>      }
>  
>      for (n = 0; n < smp_cpus; n++) {
> +        ARMCPU *cpu;
>          env = cpu_init(cpu_model);
>          if (!env) {
>              fprintf(stderr, "Unable to find CPU definition\n");
>              exit(1);
>          }
> +        cpu = arm_env_get_cpu(env);
> +        /* This will become a QOM property eventually */
> +        cpu->reset_cbar = GIC_BASE_ADDR;
>          irqp = arm_pic_init_cpu(env);
>          cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];
> -        qemu_register_reset(highbank_cpu_reset, env);
>      }
>  
>      sysmem = get_system_memory();
> diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
> index 55dc920..c42755a 100644
> --- a/target-arm/cpu-qom.h
> +++ b/target-arm/cpu-qom.h
> @@ -84,6 +84,7 @@ typedef struct ARMCPU {
>      uint32_t id_isar5;
>      uint32_t clidr;
>      uint32_t ccsidr[16];
> +    uint32_t reset_cbar;
>  } ARMCPU;
>  
>  static inline ARMCPU *arm_env_get_cpu(CPUARMState *env)
> diff --git a/target-arm/cpu.c b/target-arm/cpu.c
> index 66f76a8..653e2b3 100644
> --- a/target-arm/cpu.c
> +++ b/target-arm/cpu.c
> @@ -30,7 +30,6 @@ static void arm_cpu_reset(CPUState *s)
>      ARMCPU *cpu = ARM_CPU(s);
>      ARMCPUClass *acc = ARM_CPU_GET_CLASS(cpu);
>      CPUARMState *env = &cpu->env;
> -    uint32_t tmp = 0;
>  
>      if (qemu_loglevel_mask(CPU_LOG_RESET)) {
>          qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
> @@ -39,9 +38,8 @@ static void arm_cpu_reset(CPUState *s)
>  
>      acc->parent_reset(s);
>  
> -    tmp = env->cp15.c15_config_base_address;
>      memset(env, 0, offsetof(CPUARMState, breakpoints));
> -    env->cp15.c15_config_base_address = tmp;
> +    env->cp15.c15_config_base_address = cpu->reset_cbar;
>      env->cp15.c0_cpuid = cpu->midr;
>      env->vfp.xregs[ARM_VFP_FPSID] = cpu->reset_fpsid;
>      env->vfp.xregs[ARM_VFP_MVFR0] = cpu->mvfr0;

On 30 March 2012 18:01, Mark Langsdorf <mark.langsdorf@calxeda.com> wrote:
> Odd that I wasn't actually cc'd by the mailer on this.

Oops, sorry, that's my fault. I added the 'cc' to the patch commit
message but forgot to tweak my git-send-email command line to honour
that.

> Do you want me to pull together a patch to make it a QOM property now,
> or is there some other dependency I should wait on? It may take me a
> week or so to get time to pull it together and test it.

We need realize support in QOM base classes first, so we have somewhere
we can put code which runs after properties have been set. That's
why this version is still using this slightly hacky approach.

-- PMM