From patchwork Fri Mar 30 10:26:10 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 149604 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 002B9B6FA2 for ; Fri, 30 Mar 2012 21:26:45 +1100 (EST) Received: from localhost ([::1]:51707 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SDZ2Z-0003BR-L6 for incoming@patchwork.ozlabs.org; Fri, 30 Mar 2012 06:26:43 -0400 Received: from eggs.gnu.org ([208.118.235.92]:57983) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SDZ2J-0002zg-7i for qemu-devel@nongnu.org; Fri, 30 Mar 2012 06:26:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SDZ2E-0003nX-6W for qemu-devel@nongnu.org; Fri, 30 Mar 2012 06:26:26 -0400 Received: from cantor2.suse.de ([195.135.220.15]:46834 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SDZ2D-0003n1-T7 for qemu-devel@nongnu.org; Fri, 30 Mar 2012 06:26:22 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id C7A8A915A2 for ; Fri, 30 Mar 2012 12:26:20 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Fri, 30 Mar 2012 12:26:10 +0200 Message-Id: <1333103170-13529-6-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.7 In-Reply-To: <1333103170-13529-1-git-send-email-afaerber@suse.de> References: <1333103170-13529-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [PATCH v3 5/5] target-unicore32: Move CPU-dependent init into initfn X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Instead of setting values in a CPUID switch, do so in initfn functions. Signed-off-by: Andreas Färber Acked-by: Guan Xuetao --- target-unicore32/cpu.c | 14 ++++++++++++++ target-unicore32/helper.c | 23 ----------------------- 2 files changed, 14 insertions(+), 23 deletions(-) diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c index 189b6f6..de63f58 100644 --- a/target-unicore32/cpu.c +++ b/target-unicore32/cpu.c @@ -15,6 +15,11 @@ #include "cpu-qom.h" #include "qemu-common.h" +static inline void set_feature(CPUUniCore32State *env, int feature) +{ + env->features |= feature; +} + /* CPU models */ typedef struct UniCore32CPUInfo { @@ -28,6 +33,12 @@ static void unicore_ii_cpu_initfn(Object *obj) CPUUniCore32State *env = &cpu->env; env->cp0.c0_cpuid = 0x40010863; + + set_feature(env, UC32_HWCAP_CMOV); + set_feature(env, UC32_HWCAP_UCF64); + env->ucf64.xregs[UC32_UCF64_FPSCR] = 0; + env->cp0.c0_cachetype = 0x1dd20d2; + env->cp0.c1_sys = 0x00090078; } static void uc32_any_cpu_initfn(Object *obj) @@ -36,6 +47,9 @@ static void uc32_any_cpu_initfn(Object *obj) CPUUniCore32State *env = &cpu->env; env->cp0.c0_cpuid = 0xffffffff; + + set_feature(env, UC32_HWCAP_CMOV); + set_feature(env, UC32_HWCAP_UCF64); } static const UniCore32CPUInfo uc32_cpus[] = { diff --git a/target-unicore32/helper.c b/target-unicore32/helper.c index 0f23a40..9fe4a37 100644 --- a/target-unicore32/helper.c +++ b/target-unicore32/helper.c @@ -14,16 +14,10 @@ #include "helper.h" #include "host-utils.h" -static inline void set_feature(CPUUniCore32State *env, int feature) -{ - env->features |= feature; -} - CPUUniCore32State *uc32_cpu_init(const char *cpu_model) { UniCore32CPU *cpu; CPUUniCore32State *env; - uint32_t id; static int inited = 1; if (object_class_by_name(cpu_model) == NULL) { @@ -32,23 +26,6 @@ CPUUniCore32State *uc32_cpu_init(const char *cpu_model) cpu = UNICORE32_CPU(object_new(cpu_model)); env = &cpu->env; - id = env->cp0.c0_cpuid; - switch (id) { - case UC32_CPUID_UCV2: - set_feature(env, UC32_HWCAP_CMOV); - set_feature(env, UC32_HWCAP_UCF64); - env->ucf64.xregs[UC32_UCF64_FPSCR] = 0; - env->cp0.c0_cachetype = 0x1dd20d2; - env->cp0.c1_sys = 0x00090078; - break; - case UC32_CPUID_ANY: /* For userspace emulation. */ - set_feature(env, UC32_HWCAP_CMOV); - set_feature(env, UC32_HWCAP_UCF64); - break; - default: - cpu_abort(env, "Bad CPU ID: %x\n", id); - } - if (inited) { inited = 0; uc32_translate_init();