From patchwork Fri Mar 30 07:58:27 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peter A. G. Crosthwaite" X-Patchwork-Id: 149583 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 517AEB6F9F for ; Fri, 30 Mar 2012 18:59:15 +1100 (EST) Received: from localhost ([::1]:54011 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SDWjp-00013X-7H for incoming@patchwork.ozlabs.org; Fri, 30 Mar 2012 03:59:13 -0400 Received: from eggs.gnu.org ([208.118.235.92]:33871) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SDWja-0000u3-M4 for qemu-devel@nongnu.org; Fri, 30 Mar 2012 03:58:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SDWjY-0007Bh-Vj for qemu-devel@nongnu.org; Fri, 30 Mar 2012 03:58:58 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:35530) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SDWjY-00078j-PK for qemu-devel@nongnu.org; Fri, 30 Mar 2012 03:58:56 -0400 Received: by mail-pb0-f45.google.com with SMTP id uo5so1569879pbc.4 for ; Fri, 30 Mar 2012 00:58:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:in-reply-to:references:x-gm-message-state; bh=KuXL0U8XOcFyk/IdQFf0zcvLQP0cEaBfTUujbj9fK7E=; b=O90cAjdOvBaRJxLbOXSKgfIx+2JDOr8JLLFbaMyKDKU9iMJSTj9Cc32WHGTfPe1uEe GzgtdSWdKo0ltnJka2KKjnnJbZfcixdtnQd+j9t83eXh80WDN6H6fztDX3NjszKqawyH ADcRpQiH5bcc3FZJP3MvqfZHO+XWNElSEjgR2F0FguzTXposQCVdt1h3/SsJuVYUKEhK vKCbFVI1nEZiG/vPJ+y7gNouzaPpO9SPJvz1IJfTvRK04tE6Le15CJOSNHsx1oq6bPyc 5M6wBoRjSmv2MFVYjv071elvTCH6ikez6D888dnsCYGaVafJdbrtS+iQn2VxWc9rfJ0D 3PhQ== MIME-Version: 1.0 Received: by 10.68.232.195 with SMTP id tq3mr2174241pbc.21.1333094335658; Fri, 30 Mar 2012 00:58:55 -0700 (PDT) Received: from localhost ([124.148.20.9]) by mx.google.com with ESMTPS id e7sm6848021pbs.21.2012.03.30.00.58.50 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 30 Mar 2012 00:58:54 -0700 (PDT) From: "Peter A. G. Crosthwaite" To: batuzovk@ispras.ru, kyungmin.park@samsung.com, qemu-devel@nongnu.org, paul@codesourcery.com, peter.maydell@linaro.org, edgar.iglesias@gmail.com Date: Fri, 30 Mar 2012 17:58:27 +1000 Message-Id: X-Mailer: git-send-email 1.7.3.2 In-Reply-To: References: In-Reply-To: References: X-Gm-Message-State: ALoCoQnhltmEJskpsXghKEat0pSqGmNcrSmTSS/wFP0VVic4Zxd1FhEPogDfV9bs5p7wSAVVUt8q X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: peter.crosthwaite@petalogix.com, linnj@xilinx.com, duyl@xilinx.com, zhur@ispras.ru, john.williams@petalogix.com Subject: [Qemu-devel] [PATCH v2 2/2] xilinx_zynq: added pl330 to machine model X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Peter A. G. Crosthwaite --- hw/xilinx_zynq.c | 18 ++++++++++++++++++ 1 files changed, 18 insertions(+), 0 deletions(-) diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c index 7290c64..033ba09 100644 --- a/hw/xilinx_zynq.c +++ b/hw/xilinx_zynq.c @@ -61,6 +61,9 @@ static void zynq_init(ram_addr_t ram_size, const char *boot_device, NICInfo *nd; int n; qemu_irq cpu_irq; + int dma_irqs[8] = { + 46, 47, 48, 49, 72, 73, 74, 75 + }; if (!cpu_model) { cpu_model = "cortex-a9"; @@ -130,6 +133,21 @@ static void zynq_init(ram_addr_t ram_size, const char *boot_device, } } + dev = qdev_create(NULL, "pl330"); + qdev_prop_set_uint32(dev, "cfg0", 0x001e3071); /* CR0 */ + qdev_prop_set_uint32(dev, "cfg1", 0x00000074); /* CR1 ... */ + qdev_prop_set_uint32(dev, "cfg2", 0x00000000); + qdev_prop_set_uint32(dev, "cfg3", 0x00000000); + qdev_prop_set_uint32(dev, "cfg4", 0x00000000); /* ... CR4 */ + qdev_prop_set_uint32(dev, "cfg5", 0x07ff7f73); /* CRD */ + qdev_init_nofail(dev); + busdev = sysbus_from_qdev(dev); + sysbus_mmio_map(busdev, 0, 0xF8003000); + sysbus_connect_irq(busdev, 0, pic[45-IRQ_OFFSET]); /* abort irq line */ + for (n = 0; n < 8; ++n) { /* event irqs */ + sysbus_connect_irq(busdev, n + 1, pic[dma_irqs[n] - IRQ_OFFSET]); + } + zynq_binfo.ram_size = ram_size; zynq_binfo.kernel_filename = kernel_filename; zynq_binfo.kernel_cmdline = kernel_cmdline;