From patchwork Thu Mar 29 17:14:41 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 149440 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4605CB6EE7 for ; Fri, 30 Mar 2012 04:15:30 +1100 (EST) Received: from localhost ([::1]:59948 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SDIwZ-0003cm-Hx for incoming@patchwork.ozlabs.org; Thu, 29 Mar 2012 13:15:27 -0400 Received: from eggs.gnu.org ([208.118.235.92]:52869) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SDIw5-0002mK-Ux for qemu-devel@nongnu.org; Thu, 29 Mar 2012 13:15:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SDIvw-0000U0-TZ for qemu-devel@nongnu.org; Thu, 29 Mar 2012 13:14:57 -0400 Received: from cantor2.suse.de ([195.135.220.15]:52023 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SDIvw-0000TD-HW for qemu-devel@nongnu.org; Thu, 29 Mar 2012 13:14:48 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 1F5FF90182; Thu, 29 Mar 2012 19:14:46 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Thu, 29 Mar 2012 19:14:41 +0200 Message-Id: <1333041282-3254-5-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.7 In-Reply-To: <1333041282-3254-1-git-send-email-afaerber@suse.de> References: <1333041282-3254-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: Guan Xuetao , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [PATCH v2 4/5] target-unicore32: QOM'ify CPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Embed CPUUniCore32State as first member of UniCore32CPU. Contributed under GPLv2+. Signed-off-by: Andreas Färber Acked-by: Guan Xuetao --- Makefile.target | 1 + target-unicore32/cpu-qom.h | 59 +++++++++++++++++++++++++++++ target-unicore32/cpu.c | 90 ++++++++++++++++++++++++++++++++++++++++++++ target-unicore32/cpu.h | 1 + target-unicore32/helper.c | 43 +++----------------- 5 files changed, 158 insertions(+), 36 deletions(-) create mode 100644 target-unicore32/cpu-qom.h create mode 100644 target-unicore32/cpu.c diff --git a/Makefile.target b/Makefile.target index 6e8b997..9b0cf74 100644 --- a/Makefile.target +++ b/Makefile.target @@ -99,6 +99,7 @@ libobj-y += cpu_init.o endif libobj-$(TARGET_SPARC) += int32_helper.o libobj-$(TARGET_SPARC64) += int64_helper.o +libobj-$(TARGET_UNICORE32) += cpu.o libobj-$(TARGET_ALPHA) += int_helper.o fpu_helper.o sys_helper.o mem_helper.o libobj-y += disas.o diff --git a/target-unicore32/cpu-qom.h b/target-unicore32/cpu-qom.h new file mode 100644 index 0000000..342d85e --- /dev/null +++ b/target-unicore32/cpu-qom.h @@ -0,0 +1,59 @@ +/* + * QEMU UniCore32 CPU + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation, or (at your option) any + * later version. See the COPYING file in the top-level directory. + */ +#ifndef QEMU_UC32_CPU_QOM_H +#define QEMU_UC32_CPU_QOM_H + +#include "qemu/cpu.h" +#include "cpu.h" + +#define TYPE_UNICORE32_CPU "unicore32-cpu" + +#define UNICORE32_CPU_CLASS(klass) \ + OBJECT_CLASS_CHECK(UniCore32CPUClass, (klass), TYPE_UNICORE32_CPU) +#define UNICORE32_CPU(obj) \ + OBJECT_CHECK(UniCore32CPU, (obj), TYPE_UNICORE32_CPU) +#define UNICORE32_CPU_GET_CLASS(obj) \ + OBJECT_GET_CLASS(UniCore32CPUClass, (obj), TYPE_UNICORE32_CPU) + +/** + * UniCore32CPUClass: + * + * A UniCore32 CPU model. + */ +typedef struct UniCore32CPUClass { + /*< private >*/ + CPUClass parent_class; + /*< public >*/ +} UniCore32CPUClass; + +/** + * UniCore32CPU: + * @env: #CPUUniCore32State + * + * A UniCore32 CPU. + */ +typedef struct UniCore32CPU { + /*< private >*/ + CPUState parent_obj; + /*< public >*/ + + CPUUniCore32State env; +} UniCore32CPU; + +static inline UniCore32CPU *uc32_env_get_cpu(CPUUniCore32State *env) +{ + return UNICORE32_CPU(container_of(env, UniCore32CPU, env)); +} + +#define ENV_GET_CPU(e) CPU(uc32_env_get_cpu(e)) + + +#endif diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c new file mode 100644 index 0000000..189b6f6 --- /dev/null +++ b/target-unicore32/cpu.c @@ -0,0 +1,90 @@ +/* + * QEMU UniCore32 CPU + * + * Copyright (c) 2010-2011 GUAN Xue-tao + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Contributions from 2012-04-01 on are considered under GPL version 2, + * or (at your option) any later version. + */ + +#include "cpu-qom.h" +#include "qemu-common.h" + +/* CPU models */ + +typedef struct UniCore32CPUInfo { + const char *name; + void (*instance_init)(Object *obj); +} UniCore32CPUInfo; + +static void unicore_ii_cpu_initfn(Object *obj) +{ + UniCore32CPU *cpu = UNICORE32_CPU(obj); + CPUUniCore32State *env = &cpu->env; + + env->cp0.c0_cpuid = 0x40010863; +} + +static void uc32_any_cpu_initfn(Object *obj) +{ + UniCore32CPU *cpu = UNICORE32_CPU(obj); + CPUUniCore32State *env = &cpu->env; + + env->cp0.c0_cpuid = 0xffffffff; +} + +static const UniCore32CPUInfo uc32_cpus[] = { + { .name = "UniCore-II", .instance_init = unicore_ii_cpu_initfn }, + { .name = "any", .instance_init = uc32_any_cpu_initfn }, +}; + +static void uc32_cpu_initfn(Object *obj) +{ + UniCore32CPU *cpu = UNICORE32_CPU(obj); + CPUUniCore32State *env = &cpu->env; + + cpu_exec_init(env); + env->cpu_model_str = object_get_typename(obj); + + env->uncached_asr = ASR_MODE_USER; + env->regs[31] = 0; + + tlb_flush(env, 1); +} + +static void uc32_register_cpu_type(const UniCore32CPUInfo *info) +{ + TypeInfo type_info = { + .name = info->name, + .parent = TYPE_UNICORE32_CPU, + .instance_init = info->instance_init, + }; + + type_register_static(&type_info); +} + +static const TypeInfo uc32_cpu_type_info = { + .name = TYPE_UNICORE32_CPU, + .parent = TYPE_CPU, + .instance_size = sizeof(UniCore32CPU), + .instance_init = uc32_cpu_initfn, + .abstract = true, + .class_size = sizeof(UniCore32CPUClass), +}; + +static void uc32_cpu_register_types(void) +{ + int i; + + type_register_static(&uc32_cpu_type_info); + for (i = 0; i < ARRAY_SIZE(uc32_cpus); i++) { + uc32_register_cpu_type(&uc32_cpus[i]); + } +} + +type_init(uc32_cpu_register_types) diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h index 8ec0d2f..81c14ff 100644 --- a/target-unicore32/cpu.h +++ b/target-unicore32/cpu.h @@ -160,6 +160,7 @@ static inline void cpu_set_tls(CPUUniCore32State *env, target_ulong newtls) } #include "cpu-all.h" +#include "cpu-qom.h" #include "exec-all.h" static inline void cpu_pc_from_tb(CPUUniCore32State *env, TranslationBlock *tb) diff --git a/target-unicore32/helper.c b/target-unicore32/helper.c index 18a9cbb..0f23a40 100644 --- a/target-unicore32/helper.c +++ b/target-unicore32/helper.c @@ -19,43 +19,20 @@ static inline void set_feature(CPUUniCore32State *env, int feature) env->features |= feature; } -struct uc32_cpu_t { - uint32_t id; - const char *name; -}; - -static const struct uc32_cpu_t uc32_cpu_names[] = { - { UC32_CPUID_UCV2, "UniCore-II"}, - { UC32_CPUID_ANY, "any"}, - { 0, NULL} -}; - -/* return 0 if not found */ -static uint32_t uc32_cpu_find_by_name(const char *name) -{ - int i; - uint32_t id; - - id = 0; - for (i = 0; uc32_cpu_names[i].name; i++) { - if (strcmp(name, uc32_cpu_names[i].name) == 0) { - id = uc32_cpu_names[i].id; - break; - } - } - return id; -} - CPUUniCore32State *uc32_cpu_init(const char *cpu_model) { + UniCore32CPU *cpu; CPUUniCore32State *env; uint32_t id; static int inited = 1; - env = g_malloc0(sizeof(CPUUniCore32State)); - cpu_exec_init(env); + if (object_class_by_name(cpu_model) == NULL) { + return NULL; + } + cpu = UNICORE32_CPU(object_new(cpu_model)); + env = &cpu->env; - id = uc32_cpu_find_by_name(cpu_model); + id = env->cp0.c0_cpuid; switch (id) { case UC32_CPUID_UCV2: set_feature(env, UC32_HWCAP_CMOV); @@ -72,17 +49,11 @@ CPUUniCore32State *uc32_cpu_init(const char *cpu_model) cpu_abort(env, "Bad CPU ID: %x\n", id); } - env->cpu_model_str = cpu_model; - env->cp0.c0_cpuid = id; - env->uncached_asr = ASR_MODE_USER; - env->regs[31] = 0; - if (inited) { inited = 0; uc32_translate_init(); } - tlb_flush(env, 1); qemu_init_vcpu(env); return env; }