Patchwork [v1,2/2] xilinx_zynq: added pl330 to machine model

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Submitter Peter A. G. Crosthwaite
Date March 29, 2012, 2:54 a.m.
Message ID <3667f1011a327c424d9bee2153443e2221f7b37d.1332989118.git.peter.crosthwaite@petalogix.com>
Download mbox | patch
Permalink /patch/149357/
State New
Headers show

Comments

Peter A. G. Crosthwaite - March 29, 2012, 2:54 a.m.
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
---
 hw/xilinx_zynq.c |   18 ++++++++++++++++++
 1 files changed, 18 insertions(+), 0 deletions(-)

Patch

diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index 7290c64..033ba09 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@@ -61,6 +61,9 @@  static void zynq_init(ram_addr_t ram_size, const char *boot_device,
     NICInfo *nd;
     int n;
     qemu_irq cpu_irq;
+    int dma_irqs[8] = {
+        46, 47, 48, 49, 72, 73, 74, 75
+    };
 
     if (!cpu_model) {
         cpu_model = "cortex-a9";
@@ -130,6 +133,21 @@  static void zynq_init(ram_addr_t ram_size, const char *boot_device,
         }
     }
 
+    dev = qdev_create(NULL, "pl330");
+    qdev_prop_set_uint32(dev, "cfg0", 0x001e3071); /* CR0 */
+    qdev_prop_set_uint32(dev, "cfg1", 0x00000074); /* CR1 ... */
+    qdev_prop_set_uint32(dev, "cfg2", 0x00000000);
+    qdev_prop_set_uint32(dev, "cfg3", 0x00000000);
+    qdev_prop_set_uint32(dev, "cfg4", 0x00000000); /* ... CR4 */
+    qdev_prop_set_uint32(dev, "cfg5", 0x07ff7f73); /* CRD */
+    qdev_init_nofail(dev);
+    busdev = sysbus_from_qdev(dev);
+    sysbus_mmio_map(busdev, 0, 0xF8003000);
+    sysbus_connect_irq(busdev, 0, pic[45-IRQ_OFFSET]); /* abort irq line */
+    for (n = 0; n < 8; ++n) { /* event irqs */
+        sysbus_connect_irq(busdev, n + 1, pic[dma_irqs[n] - IRQ_OFFSET]);
+    }
+
     zynq_binfo.ram_size = ram_size;
     zynq_binfo.kernel_filename = kernel_filename;
     zynq_binfo.kernel_cmdline = kernel_cmdline;