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[U-Boot,2/2] i.MX6: mx6q_sabrelite: add SATA bindings

Message ID 1332716409-29225-3-git-send-email-eric.nelson@boundarydevices.com
State Changes Requested
Delegated to: Stefano Babic
Headers show

Commit Message

Eric Nelson March 25, 2012, 11 p.m. UTC
V2 has been stripped of the board-independent changes and
uses clrsetbits_le32() instead of twiddling bits by hand.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
---
 board/freescale/mx6qsabrelite/mx6qsabrelite.c |   32 +++++++++++++++++++++++++
 include/configs/mx6qsabrelite.h               |   13 ++++++++++
 2 files changed, 45 insertions(+), 0 deletions(-)

Comments

Stefano Babic March 26, 2012, 8:35 a.m. UTC | #1
On 26/03/2012 01:00, Eric Nelson wrote:
> V2 has been stripped of the board-independent changes and
> uses clrsetbits_le32() instead of twiddling bits by hand.
> 
> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
> ---

Hi Eric,

>  board/freescale/mx6qsabrelite/mx6qsabrelite.c |   32 +++++++++++++++++++++++++
>  include/configs/mx6qsabrelite.h               |   13 ++++++++++
>  2 files changed, 45 insertions(+), 0 deletions(-)
> 
> diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
> index 1d09a72..afb1245 100644
> --- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
> +++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
> @@ -25,6 +25,8 @@
>  #include <asm/arch/imx-regs.h>
>  #include <asm/arch/mx6x_pins.h>
>  #include <asm/arch/iomux-v3.h>
> +#include <asm/arch/ccm_regs.h>
> +#include <asm/arch/clock.h>
>  #include <asm/errno.h>
>  #include <asm/gpio.h>
>  #include <mmc.h>
> @@ -267,6 +269,32 @@ int board_eth_init(bd_t *bis)
>  	return 0;
>  }
>  
> +#ifdef CONFIG_CMD_SATA
> +
> +int setup_sata(void)
> +{
> +	int rval = enable_sata_clock();

What about to return at this point if there is an error ?

Best regards,
Stefano Babic
diff mbox

Patch

diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index 1d09a72..afb1245 100644
--- a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
+++ b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
@@ -25,6 +25,8 @@ 
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/mx6x_pins.h>
 #include <asm/arch/iomux-v3.h>
+#include <asm/arch/ccm_regs.h>
+#include <asm/arch/clock.h>
 #include <asm/errno.h>
 #include <asm/gpio.h>
 #include <mmc.h>
@@ -267,6 +269,32 @@  int board_eth_init(bd_t *bis)
 	return 0;
 }
 
+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+	int rval = enable_sata_clock();
+	if (rval == 0) {
+		struct iomuxc_base_regs *const iomuxc_regs
+			= (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
+		clrsetbits_le32(&iomuxc_regs->gpr[13],
+				IOMUXC_GPR13_SATA_MASK,
+				IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
+				|IOMUXC_GPR13_SATA_PHY_7_SATA2M
+				|IOMUXC_GPR13_SATA_SPEED_3G
+				|(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
+				|IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
+				|IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
+				|IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
+				|IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
+				|IOMUXC_GPR13_SATA_PHY_1_SLOW);
+		rval = 0;
+	}
+
+	return rval;
+}
+#endif
+
 int board_early_init_f(void)
 {
        setup_iomux_uart();
@@ -283,6 +311,10 @@  int board_init(void)
 	setup_spi();
 #endif
 
+#ifdef CONFIG_CMD_SATA
+	setup_sata();
+#endif
+
        return 0;
 }
 
diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
index c851559..a3c97c6 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -71,6 +71,19 @@ 
 #define CONFIG_CMD_FAT
 #define CONFIG_DOS_PARTITION
 
+#define CONFIG_CMD_SATA
+/*
+ * SATA Configs
+ */
+#ifdef CONFIG_CMD_SATA
+#define CONFIG_DWC_AHSATA
+#define CONFIG_SYS_SATA_MAX_DEVICE	1
+#define CONFIG_DWC_AHSATA_PORT_ID	0
+#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
+#define CONFIG_LBA48
+#define CONFIG_LIBATA
+#endif
+
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_MII