From patchwork Sat Mar 24 16:51:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 148521 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id DD15FB6EE8 for ; Sun, 25 Mar 2012 03:57:26 +1100 (EST) Received: from localhost ([::1]:43501 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SBUCa-0007CM-NN for incoming@patchwork.ozlabs.org; Sat, 24 Mar 2012 12:52:28 -0400 Received: from eggs.gnu.org ([208.118.235.92]:37531) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SBUBi-0004cj-6w for qemu-devel@nongnu.org; Sat, 24 Mar 2012 12:51:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SBUBe-000562-P2 for qemu-devel@nongnu.org; Sat, 24 Mar 2012 12:51:33 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:32817) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SBUBe-00054i-G5 for qemu-devel@nongnu.org; Sat, 24 Mar 2012 12:51:30 -0400 Received: by mail-pb0-f45.google.com with SMTP id uo5so4534882pbc.4 for ; Sat, 24 Mar 2012 09:51:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=1S6oZork00/NQRzC6CRiPPckVcvNvETVLADyHd62DN4=; b=xnkdiWXKT3BLWNuMNsZ1Q3n3WsRrNhGQgcs1rv9dUnj35OgCRpoI9czUqJJMgDbfG4 STkWS8+EzQGwZtmxjCb8RHrb585tbVsHFqxj401H80y3DuiEDFwt4LUeLYXEtMa/C5Mz aBN0BllshVfE17Csw1DlNfZwTMi8P1aYcntocdHuhtO+AAhDVsN0yBITzH7dX5Kg4Xrc 9DxLMXv/xigpWX8gWKkb38J4RprLBFTUs/uW1Z609M7Y1pPxGzaMuRguvAmJ7YbSNzGp Y+1ZvDarDDiDypRV1ltMUz7N1qDyXbBluzYTc0b69kYrVdgyFj2EpHYMhqs5VblukPBH 1lRA== Received: by 10.68.74.97 with SMTP id s1mr39010972pbv.46.1332607889577; Sat, 24 Mar 2012 09:51:29 -0700 (PDT) Received: from pebble.twiddle.home ([173.160.232.49]) by mx.google.com with ESMTPS id q8sm8412101pbi.1.2012.03.24.09.51.28 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 24 Mar 2012 09:51:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sat, 24 Mar 2012 09:51:11 -0700 Message-Id: <1332607875-18895-7-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.7.6 In-Reply-To: <1332607875-18895-1-git-send-email-rth@twiddle.net> References: <1332607875-18895-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.160.45 Cc: blauwirbel@gmail.com Subject: [Qemu-devel] [PATCH 06/10] target-alpha: Move integer overflow helpers to int_helper.c. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-alpha/helper.h | 12 ++++---- target-alpha/int_helper.c | 63 +++++++++++++++++++++++++++++++++++++++++++++ target-alpha/op_helper.c | 62 -------------------------------------------- target-alpha/translate.c | 45 +++++++++++++++++++++++++++----- 4 files changed, 107 insertions(+), 75 deletions(-) diff --git a/target-alpha/helper.h b/target-alpha/helper.h index e193c26..45e187d 100644 --- a/target-alpha/helper.h +++ b/target-alpha/helper.h @@ -3,12 +3,12 @@ DEF_HELPER_3(excp, void, env, int, int) DEF_HELPER_FLAGS_0(load_pcc, TCG_CALL_CONST | TCG_CALL_PURE, i64) -DEF_HELPER_2(addqv, i64, i64, i64) -DEF_HELPER_2(addlv, i64, i64, i64) -DEF_HELPER_2(subqv, i64, i64, i64) -DEF_HELPER_2(sublv, i64, i64, i64) -DEF_HELPER_2(mullv, i64, i64, i64) -DEF_HELPER_2(mulqv, i64, i64, i64) +DEF_HELPER_3(addqv, i64, env, i64, i64) +DEF_HELPER_3(addlv, i64, env, i64, i64) +DEF_HELPER_3(subqv, i64, env, i64, i64) +DEF_HELPER_3(sublv, i64, env, i64, i64) +DEF_HELPER_3(mullv, i64, env, i64, i64) +DEF_HELPER_3(mulqv, i64, env, i64, i64) DEF_HELPER_FLAGS_2(umulh, TCG_CALL_CONST | TCG_CALL_PURE, i64, i64, i64) DEF_HELPER_FLAGS_1(ctpop, TCG_CALL_CONST | TCG_CALL_PURE, i64, i64) diff --git a/target-alpha/int_helper.c b/target-alpha/int_helper.c index 79c0cfe..28ac1b9 100644 --- a/target-alpha/int_helper.c +++ b/target-alpha/int_helper.c @@ -255,3 +255,66 @@ uint64_t helper_unpkbw(uint64_t op1) | ((op1 & 0xff0000) << 16) | ((op1 & 0xff000000) << 24)); } + +uint64_t helper_addqv(CPUAlphaState *env, uint64_t op1, uint64_t op2) +{ + uint64_t tmp = op1; + op1 += op2; + if (unlikely((tmp ^ op2 ^ (-1ULL)) & (tmp ^ op1) & (1ULL << 63))) { + arith_excp(env, GETPC(), EXC_M_IOV, 0); + } + return op1; +} + +uint64_t helper_addlv(CPUAlphaState *env, uint64_t op1, uint64_t op2) +{ + uint64_t tmp = op1; + op1 = (uint32_t)(op1 + op2); + if (unlikely((tmp ^ op2 ^ (-1UL)) & (tmp ^ op1) & (1UL << 31))) { + arith_excp(env, GETPC(), EXC_M_IOV, 0); + } + return op1; +} + +uint64_t helper_subqv(CPUAlphaState *env, uint64_t op1, uint64_t op2) +{ + uint64_t res; + res = op1 - op2; + if (unlikely((op1 ^ op2) & (res ^ op1) & (1ULL << 63))) { + arith_excp(env, GETPC(), EXC_M_IOV, 0); + } + return res; +} + +uint64_t helper_sublv(CPUAlphaState *env, uint64_t op1, uint64_t op2) +{ + uint32_t res; + res = op1 - op2; + if (unlikely((op1 ^ op2) & (res ^ op1) & (1UL << 31))) { + arith_excp(env, GETPC(), EXC_M_IOV, 0); + } + return res; +} + +uint64_t helper_mullv(CPUAlphaState *env, uint64_t op1, uint64_t op2) +{ + int64_t res = (int64_t)op1 * (int64_t)op2; + + if (unlikely((int32_t)res != res)) { + arith_excp(env, GETPC(), EXC_M_IOV, 0); + } + return (int64_t)((int32_t)res); +} + +uint64_t helper_mulqv(CPUAlphaState *env, uint64_t op1, uint64_t op2) +{ + uint64_t tl, th; + + muls64(&tl, &th, op1, op2); + /* If th != 0 && th != -1, then we had an overflow */ + if (unlikely((th + 1) > 1)) { + arith_excp(env, GETPC(), EXC_M_IOV, 0); + } + return tl; +} + diff --git a/target-alpha/op_helper.c b/target-alpha/op_helper.c index 59ee31e..c51b535 100644 --- a/target-alpha/op_helper.c +++ b/target-alpha/op_helper.c @@ -43,68 +43,6 @@ uint64_t helper_load_pcc (void) #endif } -uint64_t helper_addqv (uint64_t op1, uint64_t op2) -{ - uint64_t tmp = op1; - op1 += op2; - if (unlikely((tmp ^ op2 ^ (-1ULL)) & (tmp ^ op1) & (1ULL << 63))) { - arith_excp(env, GETPC(), EXC_M_IOV, 0); - } - return op1; -} - -uint64_t helper_addlv (uint64_t op1, uint64_t op2) -{ - uint64_t tmp = op1; - op1 = (uint32_t)(op1 + op2); - if (unlikely((tmp ^ op2 ^ (-1UL)) & (tmp ^ op1) & (1UL << 31))) { - arith_excp(env, GETPC(), EXC_M_IOV, 0); - } - return op1; -} - -uint64_t helper_subqv (uint64_t op1, uint64_t op2) -{ - uint64_t res; - res = op1 - op2; - if (unlikely((op1 ^ op2) & (res ^ op1) & (1ULL << 63))) { - arith_excp(env, GETPC(), EXC_M_IOV, 0); - } - return res; -} - -uint64_t helper_sublv (uint64_t op1, uint64_t op2) -{ - uint32_t res; - res = op1 - op2; - if (unlikely((op1 ^ op2) & (res ^ op1) & (1UL << 31))) { - arith_excp(env, GETPC(), EXC_M_IOV, 0); - } - return res; -} - -uint64_t helper_mullv (uint64_t op1, uint64_t op2) -{ - int64_t res = (int64_t)op1 * (int64_t)op2; - - if (unlikely((int32_t)res != res)) { - arith_excp(env, GETPC(), EXC_M_IOV, 0); - } - return (int64_t)((int32_t)res); -} - -uint64_t helper_mulqv (uint64_t op1, uint64_t op2) -{ - uint64_t tl, th; - - muls64(&tl, &th, op1, op2); - /* If th != 0 && th != -1, then we had an overflow */ - if (unlikely((th + 1) > 1)) { - arith_excp(env, GETPC(), EXC_M_IOV, 0); - } - return tl; -} - /* PALcode support special instructions */ #if !defined (CONFIG_USER_ONLY) void helper_hw_ret (uint64_t a) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 6f31b6d..551237c 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -1392,14 +1392,8 @@ static inline void glue(gen_, name)(int ra, int rb, int rc, int islit,\ tcg_temp_free(tmp1); \ } \ } -ARITH3(cmpbge) -ARITH3(addlv) -ARITH3(sublv) -ARITH3(addqv) -ARITH3(subqv) ARITH3(umulh) -ARITH3(mullv) -ARITH3(mulqv) +ARITH3(cmpbge) ARITH3(minub8) ARITH3(minsb8) ARITH3(minuw4) @@ -1410,6 +1404,43 @@ ARITH3(maxuw4) ARITH3(maxsw4) ARITH3(perr) +/* Code to call arith3 helpers */ +#define ARITH3_EX(name) \ + static inline void glue(gen_, name)(int ra, int rb, int rc, \ + int islit, uint8_t lit) \ + { \ + if (unlikely(rc == 31)) { \ + return; \ + } \ + if (ra != 31) { \ + if (islit) { \ + TCGv tmp = tcg_const_i64(lit); \ + gen_helper_ ## name(cpu_ir[rc], cpu_env, \ + cpu_ir[ra], tmp); \ + tcg_temp_free(tmp); \ + } else { \ + gen_helper_ ## name(cpu_ir[rc], cpu_env, \ + cpu_ir[ra], cpu_ir[rb]); \ + } \ + } else { \ + TCGv tmp1 = tcg_const_i64(0); \ + if (islit) { \ + TCGv tmp2 = tcg_const_i64(lit); \ + gen_helper_ ## name(cpu_ir[rc], cpu_env, tmp1, tmp2); \ + tcg_temp_free(tmp2); \ + } else { \ + gen_helper_ ## name(cpu_ir[rc], cpu_env, tmp1, cpu_ir[rb]); \ + } \ + tcg_temp_free(tmp1); \ + } \ + } +ARITH3_EX(addlv) +ARITH3_EX(sublv) +ARITH3_EX(addqv) +ARITH3_EX(subqv) +ARITH3_EX(mullv) +ARITH3_EX(mulqv) + #define MVIOP2(name) \ static inline void glue(gen_, name)(int rb, int rc) \ { \