From patchwork Wed Mar 21 03:37:16 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: walimis X-Patchwork-Id: 147905 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8BC44B6EEF for ; Wed, 21 Mar 2012 14:38:53 +1100 (EST) Received: from localhost ([::1]:51264 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SACNt-0001xi-Mu for incoming@patchwork.ozlabs.org; Tue, 20 Mar 2012 23:38:49 -0400 Received: from eggs.gnu.org ([208.118.235.92]:40010) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SACNn-0001xE-Bx for qemu-devel@nongnu.org; Tue, 20 Mar 2012 23:38:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SACNl-00042r-DO for qemu-devel@nongnu.org; Tue, 20 Mar 2012 23:38:42 -0400 Received: from mail-qa0-f52.google.com ([209.85.216.52]:64369) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SACNl-00042g-6u for qemu-devel@nongnu.org; Tue, 20 Mar 2012 23:38:41 -0400 Received: by qabg40 with SMTP id g40so417559qab.4 for ; Tue, 20 Mar 2012 20:38:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer; bh=sySqKHBVsr1mHXQWjxvxq28Ll6TTVTfe1nnztmlc9TI=; b=JSavAdVb4XSMLsUkWzPEx4P+Yh+FaPKyv9DNtsmjrd/FrtuHos8YwWE207sy092H/R 0SHEN5BKQP4gAh2gA3BzbkQoCvyphpJH5URty3Q6uV3nRRYOcQDPO3zinVraEqGLiBh7 y6VJ4DZx4HIopreo137OD8SZjU40E0ck/mEaPeSnZxVJFhkg6JarK6HhGK/9P4KAJsqT RcLB90j9Q7kPVOT5nv3Nwi2DhJiqvwN8YtUwVNIrjObz++Vl6iJMPfQJouN9PrBNUUUi k9TSz/tIRAmdREo4lLyrm3NzfJExYS6kgGWnBKxs3PS8ebV/np7PJYixMUaMNgCCptK/ kt2w== Received: by 10.229.106.34 with SMTP id v34mr893492qco.153.1332301119492; Tue, 20 Mar 2012 20:38:39 -0700 (PDT) Received: from localhost ([61.148.56.138]) by mx.google.com with ESMTPS id dq1sm797962qab.22.2012.03.20.20.38.35 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 20 Mar 2012 20:38:38 -0700 (PDT) From: Liming Wang To: Peter Maydell Date: Wed, 21 Mar 2012 11:37:16 +0800 Message-Id: <1332301036-20696-1-git-send-email-walimisdev@gmail.com> X-Mailer: git-send-email 1.7.0.4 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.216.52 Cc: qemu-devel@nongnu.org Subject: [Qemu-devel] [PATCH v2] hw/vexpress.c: Add NOR flash model X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Vexpress motherboard has two 2x16 NOR flash, but pflash_cfi01 doesn't support interleaving, so here only models two 1x32 flash. Although it's not exactly modeled, it works fine for running linux. Signed-off-by: Liming Wang --- v2: - swap NORFLASH0 and NORFLASH0ALIAS and reserve NORFLASH0ALIAS if we want to boot from flash0 in the future. hw/vexpress.c | 28 ++++++++++++++++++++++------ 1 files changed, 22 insertions(+), 6 deletions(-) diff --git a/hw/vexpress.c b/hw/vexpress.c index b9aafec..6a5bf4e 100644 --- a/hw/vexpress.c +++ b/hw/vexpress.c @@ -29,9 +29,13 @@ #include "sysemu.h" #include "boards.h" #include "exec-memory.h" +#include "flash.h" +#include "blockdev.h" #define VEXPRESS_BOARD_ID 0x8e0 +#define VEXPRESS_FLASH_SIZE 0x04000000 + static struct arm_boot_info vexpress_binfo; /* Address maps for peripherals: @@ -61,8 +65,8 @@ enum { VE_RTC, VE_COMPACTFLASH, VE_CLCD, - VE_NORFLASH0, VE_NORFLASH0ALIAS, + VE_NORFLASH0, VE_NORFLASH1, VE_SRAM, VE_VIDEORAM, @@ -92,6 +96,7 @@ static target_phys_addr_t motherboard_legacy_map[] = { [VE_COMPACTFLASH] = 0x1001a000, [VE_CLCD] = 0x1001f000, /* CS0: 0x40000000 .. 0x44000000 */ + [VE_NORFLASH0ALIAS] = 0x40000000, [VE_NORFLASH0] = 0x40000000, /* CS1: 0x44000000 .. 0x48000000 */ [VE_NORFLASH1] = 0x44000000, @@ -105,8 +110,8 @@ static target_phys_addr_t motherboard_legacy_map[] = { static target_phys_addr_t motherboard_aseries_map[] = { /* CS0: 0x00000000 .. 0x0c000000 */ - [VE_NORFLASH0] = 0x00000000, - [VE_NORFLASH0ALIAS] = 0x08000000, + [VE_NORFLASH0ALIAS] = 0x00000000, + [VE_NORFLASH0] = 0x08000000, /* CS4: 0x0c000000 .. 0x10000000 */ [VE_NORFLASH1] = 0x0c000000, /* CS5: 0x10000000 .. 0x14000000 */ @@ -355,6 +360,9 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard, MemoryRegion *vram = g_new(MemoryRegion, 1); MemoryRegion *sram = g_new(MemoryRegion, 1); const target_phys_addr_t *map = daughterboard->motherboard_map; + DriveInfo *dinfo = NULL; + uint32_t sector_len = 256 * 1024; + int i = 0; daughterboard->init(daughterboard, ram_size, cpu_model, pic, &proc_id); @@ -405,9 +413,17 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard, sysbus_create_simple("pl111", map[VE_CLCD], pic[14]); - /* VE_NORFLASH0: not modelled */ - /* VE_NORFLASH0ALIAS: not modelled */ - /* VE_NORFLASH1: not modelled */ + for (i = 0; i < 2; i++) { + dinfo = drive_get(IF_PFLASH, 0, i); + if (dinfo) { + pflash_cfi01_register(i ? map[VE_NORFLASH1] : map[VE_NORFLASH0], + NULL, + i ? "vexpress.flash1" : "vexpress:flash0", + VEXPRESS_FLASH_SIZE, dinfo->bdrv, sector_len, + VEXPRESS_FLASH_SIZE / sector_len, 4, + 0, 0x89, 0x89, 0x19, 0); + } + } sram_size = 0x2000000; memory_region_init_ram(sram, "vexpress.sram", sram_size);