Message ID | 1331659609-21572-1-git-send-email-fabio.estevam@freescale.com |
---|---|
State | Accepted |
Commit | cece262209aaacf6f842c8d15832f882eb2467d8 |
Delegated to: | Stefano Babic |
Headers | show |
On 13/03/2012 18:26, Fabio Estevam wrote: > After booting mx6qsabrelite from POR the following is reported: > > CPU: Freescale i.MX61 family rev1.0 at 792 MHz > Reset cause: unknown reset > > This is because both the POR and WDOG bits are set after reset. > > Fix this by also checking both bits in the POR case. > > Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Applied to u-boot-imx, thanks. Best regards, Stefano Babic
diff --git a/arch/arm/cpu/armv7/imx-common/cpu.c b/arch/arm/cpu/armv7/imx-common/cpu.c index 1e30ae5..6d7486b 100644 --- a/arch/arm/cpu/armv7/imx-common/cpu.c +++ b/arch/arm/cpu/armv7/imx-common/cpu.c @@ -44,6 +44,7 @@ static char *get_reset_cause(void) switch (cause) { case 0x00001: + case 0x00011: return "POR"; case 0x00004: return "CSU";
After booting mx6qsabrelite from POR the following is reported: CPU: Freescale i.MX61 family rev1.0 at 792 MHz Reset cause: unknown reset This is because both the POR and WDOG bits are set after reset. Fix this by also checking both bits in the POR case. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> --- arch/arm/cpu/armv7/imx-common/cpu.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)