From patchwork Sat Mar 10 16:53:48 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 145884 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 38D8DB6FA4 for ; Sun, 11 Mar 2012 05:02:34 +1100 (EST) Received: from localhost ([::1]:46451 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S6Pa8-00017t-T4 for incoming@patchwork.ozlabs.org; Sat, 10 Mar 2012 11:55:48 -0500 Received: from eggs.gnu.org ([208.118.235.92]:41577) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S6PYZ-0006TK-LP for qemu-devel@nongnu.org; Sat, 10 Mar 2012 11:54:31 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S6PYX-0001Tp-4b for qemu-devel@nongnu.org; Sat, 10 Mar 2012 11:54:11 -0500 Received: from cantor2.suse.de ([195.135.220.15]:42655 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S6PYW-0001TI-Rs for qemu-devel@nongnu.org; Sat, 10 Mar 2012 11:54:09 -0500 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id A6814A2BD7; Sat, 10 Mar 2012 17:54:07 +0100 (CET) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Date: Sat, 10 Mar 2012 17:53:48 +0100 Message-Id: <1331398436-20761-13-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.7 In-Reply-To: <1331398436-20761-1-git-send-email-afaerber@suse.de> References: <1330893156-26569-1-git-send-email-afaerber@suse.de> <1331398436-20761-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: Peter Maydell , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paul Brook Subject: [Qemu-devel] [PATCH RFC v4 12/20] target-arm: Move the PXA270's iwMMXt reset to pxa270_reset() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org No other emulated CPU uses this at this time. Signed-off-by: Andreas Färber Cc: Peter Maydell Cc: Andrzej Zaborowski --- target-arm/cpu.c | 14 ++++++++++++++ target-arm/cpu.h | 6 ------ target-arm/helper.c | 8 -------- 3 files changed, 14 insertions(+), 14 deletions(-) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 2f3190a..1614be4 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -233,8 +233,22 @@ static void pxa25x_class_init(ARMCPUClass *k, const ARMCPUInfo *info) set_class_feature(k, ARM_FEATURE_XSCALE); } +static void pxa270_reset(CPUState *c) +{ + ARMCPU *cpu = ARM_CPU(c); + CPUARMState *env = &cpu->env; + + arm_cpu_reset(c); + + env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q'; +} + static void pxa270_class_init(ARMCPUClass *k, const ARMCPUInfo *info) { + CPUClass *cpu_class = CPU_CLASS(k); + + cpu_class->reset = pxa270_reset; + k->cp15.c0_cachetype = 0xd172172; k->cp15.c1_sys = 0x00000078; diff --git a/target-arm/cpu.h b/target-arm/cpu.h index d7e73d8..d135221 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -406,12 +406,6 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum, #define ARM_CPUID_ARM926 0x41069265 #define ARM_CPUID_TI915T 0x54029152 #define ARM_CPUID_TI925T 0x54029252 -#define ARM_CPUID_PXA270_A0 0x69054110 -#define ARM_CPUID_PXA270_A1 0x69054111 -#define ARM_CPUID_PXA270_B0 0x69054112 -#define ARM_CPUID_PXA270_B1 0x69054113 -#define ARM_CPUID_PXA270_C0 0x69054114 -#define ARM_CPUID_PXA270_C5 0x69054117 #define ARM_CPUID_ARM1136 0x4117b363 #define ARM_CPUID_ARM1136_R2 0x4107b362 #define ARM_CPUID_ARM1176 0x410fb767 diff --git a/target-arm/helper.c b/target-arm/helper.c index 46e9dc5..421ce98 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -71,14 +71,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) env->cp15.c15_i_max = 0x000; env->cp15.c15_i_min = 0xff0; break; - case ARM_CPUID_PXA270_A0: - case ARM_CPUID_PXA270_A1: - case ARM_CPUID_PXA270_B0: - case ARM_CPUID_PXA270_B1: - case ARM_CPUID_PXA270_C0: - case ARM_CPUID_PXA270_C5: - env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q'; - break; default: break; }