From patchwork Mon Mar 5 21:33:19 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 144776 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id E4C08B6F98 for ; Tue, 6 Mar 2012 08:33:40 +1100 (EST) Comment: DKIM? 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Lu" Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hello! Attached RFC patch enhances stringop patterns to emit addr32 prefix when Pmode == SImode. I have introduced %^ operand modifier that conditionally emits "addr32" to all stringop insn templates. H.J., can you please test the patch if it works OK on SImode X32 target? I have tested it on x86_64-pc-linux-gnu {,-m32}, but I can't test anything else than that it doesn't break compilation and regression tests. Thanks, Uros. Index: config/i386/i386.c =================================================================== --- config/i386/i386.c (revision 184959) +++ config/i386/i386.c (working copy) @@ -13742,6 +13748,7 @@ get_some_local_dynamic_name (void) ; -- print a semicolon (after prefixes due to bug in older gas). ~ -- print "i" if TARGET_AVX2, "f" otherwise. @ -- print a segment register of thread base pointer load + ^ -- print addr32 address prefix if TARGET_64BIT and Pmode == SImode */ void @@ -14247,6 +14254,19 @@ ix86_print_operand (FILE *file, rtx x, int code) putc (TARGET_AVX2 ? 'i' : 'f', file); return; + case '^': + if (TARGET_64BIT && Pmode == SImode) + { + fputs ("addr32", file); +#ifndef HAVE_AS_IX86_REP_LOCK_PREFIX + if (ASSEMBLER_DIALECT == ASM_ATT) + fputs ("addr32; ", file); + else +#endif + fputs ("addr32 ", file); + } + return; + default: output_operand_lossage ("invalid operand code '%c'", code); } @@ -14386,8 +14406,8 @@ ix86_print_operand (FILE *file, rtx x, int code) static bool ix86_print_operand_punct_valid_p (unsigned char code) { - return (code == '@' || code == '*' || code == '+' - || code == '&' || code == ';' || code == '~'); + return (code == '@' || code == '*' || code == '+' || code == '&' + || code == ';' || code == '~' || code == '^'); } /* Print a memory operand whose address is ADDR. */ Index: config/i386/i386.md =================================================================== --- config/i386/i386.md (revision 184959) +++ config/i386/i386.md (working copy) @@ -60,7 +60,9 @@ ;; Y -- print condition for XOP pcom* instruction. ;; + -- print a branch hint as 'cs' or 'ds' prefix ;; ; -- print a semicolon (after prefixes due to bug in older gas). +;; ~ -- print "i" if TARGET_AVX2, "f" otherwise. ;; @ -- print a segment register of thread base pointer load +;; ^ -- print addr32 address prefix if TARGET_64BIT and Pmode == SImode (define_c_enum "unspec" [ ;; Relocation specifiers @@ -15678,17 +15687,17 @@ "ix86_current_function_needs_cld = 1;") (define_insn "*strmovdi_rex_1" - [(set (mem:DI (match_operand:DI 2 "register_operand" "0")) - (mem:DI (match_operand:DI 3 "register_operand" "1"))) - (set (match_operand:DI 0 "register_operand" "=D") - (plus:DI (match_dup 2) - (const_int 8))) - (set (match_operand:DI 1 "register_operand" "=S") - (plus:DI (match_dup 3) - (const_int 8)))] + [(set (mem:DI (match_operand:P 2 "register_operand" "0")) + (mem:DI (match_operand:P 3 "register_operand" "1"))) + (set (match_operand:P 0 "register_operand" "=D") + (plus:P (match_dup 2) + (const_int 8))) + (set (match_operand:P 1 "register_operand" "=S") + (plus:P (match_dup 3) + (const_int 8)))] "TARGET_64BIT && !(fixed_regs[SI_REG] || fixed_regs[DI_REG])" - "movsq" + "%^movsq" [(set_attr "type" "str") (set_attr "memory" "both") (set_attr "mode" "DI")]) @@ -15703,7 +15712,7 @@ (plus:P (match_dup 3) (const_int 4)))] "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])" - "movs{l|d}" + "%^movs{l|d}" [(set_attr "type" "str") (set_attr "memory" "both") (set_attr "mode" "SI")]) @@ -15718,7 +15727,7 @@ (plus:P (match_dup 3) (const_int 2)))] "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])" - "movsw" + "%^movsw" [(set_attr "type" "str") (set_attr "memory" "both") (set_attr "mode" "HI")]) @@ -15733,7 +15742,7 @@ (plus:P (match_dup 3) (const_int 1)))] "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])" - "movsb" + "%^movsb" [(set_attr "type" "str") (set_attr "memory" "both") (set (attr "prefix_rex") @@ -15756,20 +15765,20 @@ "ix86_current_function_needs_cld = 1;") (define_insn "*rep_movdi_rex64" - [(set (match_operand:DI 2 "register_operand" "=c") (const_int 0)) - (set (match_operand:DI 0 "register_operand" "=D") - (plus:DI (ashift:DI (match_operand:DI 5 "register_operand" "2") - (const_int 3)) - (match_operand:DI 3 "register_operand" "0"))) - (set (match_operand:DI 1 "register_operand" "=S") - (plus:DI (ashift:DI (match_dup 5) (const_int 3)) - (match_operand:DI 4 "register_operand" "1"))) + [(set (match_operand:P 2 "register_operand" "=c") (const_int 0)) + (set (match_operand:P 0 "register_operand" "=D") + (plus:P (ashift:P (match_operand:P 5 "register_operand" "2") + (const_int 3)) + (match_operand:P 3 "register_operand" "0"))) + (set (match_operand:P 1 "register_operand" "=S") + (plus:P (ashift:P (match_dup 5) (const_int 3)) + (match_operand:P 4 "register_operand" "1"))) (set (mem:BLK (match_dup 3)) (mem:BLK (match_dup 4))) (use (match_dup 5))] "TARGET_64BIT && !(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" - "rep{%;} movsq" + "%^rep{%;} movsq" [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "both") @@ -15788,7 +15797,7 @@ (mem:BLK (match_dup 4))) (use (match_dup 5))] "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" - "rep{%;} movs{l|d}" + "%^rep{%;} movs{l|d}" [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "both") @@ -15805,7 +15814,7 @@ (mem:BLK (match_dup 4))) (use (match_dup 5))] "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" - "rep{%;} movsb" + "%^rep{%;} movsb" [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "both") @@ -15866,14 +15875,14 @@ "ix86_current_function_needs_cld = 1;") (define_insn "*strsetdi_rex_1" - [(set (mem:DI (match_operand:DI 1 "register_operand" "0")) + [(set (mem:DI (match_operand:P 1 "register_operand" "0")) (match_operand:DI 2 "register_operand" "a")) - (set (match_operand:DI 0 "register_operand" "=D") - (plus:DI (match_dup 1) - (const_int 8)))] + (set (match_operand:P 0 "register_operand" "=D") + (plus:P (match_dup 1) + (const_int 8)))] "TARGET_64BIT && !(fixed_regs[AX_REG] || fixed_regs[DI_REG])" - "stosq" + "%^stosq" [(set_attr "type" "str") (set_attr "memory" "store") (set_attr "mode" "DI")]) @@ -15885,7 +15894,7 @@ (plus:P (match_dup 1) (const_int 4)))] "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" - "stos{l|d}" + "%^stos{l|d}" [(set_attr "type" "str") (set_attr "memory" "store") (set_attr "mode" "SI")]) @@ -15897,7 +15906,7 @@ (plus:P (match_dup 1) (const_int 2)))] "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" - "stosw" + "%^stosw" [(set_attr "type" "str") (set_attr "memory" "store") (set_attr "mode" "HI")]) @@ -15909,7 +15918,7 @@ (plus:P (match_dup 1) (const_int 1)))] "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" - "stosb" + "%^stosb" [(set_attr "type" "str") (set_attr "memory" "store") (set (attr "prefix_rex") @@ -15930,18 +15939,18 @@ "ix86_current_function_needs_cld = 1;") (define_insn "*rep_stosdi_rex64" - [(set (match_operand:DI 1 "register_operand" "=c") (const_int 0)) - (set (match_operand:DI 0 "register_operand" "=D") - (plus:DI (ashift:DI (match_operand:DI 4 "register_operand" "1") - (const_int 3)) - (match_operand:DI 3 "register_operand" "0"))) + [(set (match_operand:P 1 "register_operand" "=c") (const_int 0)) + (set (match_operand:P 0 "register_operand" "=D") + (plus:P (ashift:P (match_operand:P 4 "register_operand" "1") + (const_int 3)) + (match_operand:P 3 "register_operand" "0"))) (set (mem:BLK (match_dup 3)) (const_int 0)) (use (match_operand:DI 2 "register_operand" "a")) (use (match_dup 4))] "TARGET_64BIT && !(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" - "rep{%;} stosq" + "%^rep{%;} stosq" [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "store") @@ -15958,7 +15967,7 @@ (use (match_operand:SI 2 "register_operand" "a")) (use (match_dup 4))] "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" - "rep{%;} stos{l|d}" + "%^rep{%;} stos{l|d}" [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "store") @@ -15974,7 +15983,7 @@ (use (match_operand:QI 2 "register_operand" "a")) (use (match_dup 4))] "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" - "rep{%;} stosb" + "%^rep{%;} stosb" [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "store") @@ -16095,7 +16104,7 @@ (clobber (match_operand:P 1 "register_operand" "=D")) (clobber (match_operand:P 2 "register_operand" "=c"))] "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" - "repz{%;} cmpsb" + "%^repz{%;} cmpsb" [(set_attr "type" "str") (set_attr "mode" "QI") (set (attr "prefix_rex") @@ -16135,7 +16144,7 @@ (clobber (match_operand:P 1 "register_operand" "=D")) (clobber (match_operand:P 2 "register_operand" "=c"))] "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" - "repz{%;} cmpsb" + "%^repz{%;} cmpsb" [(set_attr "type" "str") (set_attr "mode" "QI") (set (attr "prefix_rex") @@ -16176,7 +16185,7 @@ (clobber (match_operand:P 1 "register_operand" "=D")) (clobber (reg:CC FLAGS_REG))] "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" - "repnz{%;} scasb" + "%^repnz{%;} scasb" [(set_attr "type" "str") (set_attr "mode" "QI") (set (attr "prefix_rex")