Patchwork [U-Boot,v2,1/5] msm7x30: Add Support for low speed uart on msm7x30

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Submitter mohamed.haneef@lntinfotech.com
Date March 5, 2012, 2:34 p.m.
Message ID <1330958045-24619-1-git-send-email-mohamed.haneef@lntinfotech.com>
Download mbox | patch
Permalink /patch/144691/
State Changes Requested
Delegated to: Albert ARIBAUD
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Comments

mohamed.haneef@lntinfotech.com - March 5, 2012, 2:34 p.m.
* Support for low speed uart

Signed-off-by: Mohamed Haneef <mohamed.haneef@lntinfotech.com>
---
Changes for v2:
 - Removed unused macros

 drivers/serial/Makefile          |    1 +
 drivers/serial/serial_msm_uart.c |  156 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 157 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/serial_msm_uart.c

--
1.7.1


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Patch

diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 616b857..2801edc 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -55,6 +55,7 @@  COBJS-$(CONFIG_S3C44B0_SERIAL) += serial_s3c44b0.o
 COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
 COBJS-$(CONFIG_SANDBOX_SERIAL) += sandbox.o
 COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
+COBJS-$(CONFIG_MSM_UART) += serial_msm_uart.o

 ifndef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/serial_msm_uart.c b/drivers/serial/serial_msm_uart.c
new file mode 100644
index 0000000..8f80561
--- /dev/null
+++ b/drivers/serial/serial_msm_uart.c
@@ -0,0 +1,156 @@ 
+/*
+ * (C) Copyright 2012
+ * LARSEN & TOUBRO INFOTECH LTD <www.lntinfotech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include <common.h>
+#include <asm/arch/iomap.h>
+#include <asm/io.h>
+#include <asm/types.h>
+
+#define UART_MR1         0x0000
+
+
+#define UART_MR2         0x0004
+
+#define UART_CSR         0x0008
+#define UART_CSR_115200  0xFF
+
+#define UART_TF          0x000C
+
+#define UART_CR          0x0010
+#define UART_CR_CMD_MODE_RESET     (12 << 4)
+
+#define UART_IMR         0x0014
+
+#define UART_IPR         0x0018
+#define UART_TFWR        0x001C
+#define UART_RFWR        0x0020
+#define UART_HCR         0x0024
+
+#define UART_MREG        0x0028
+#define UART_NREG        0x002C
+#define UART_DREG        0x0030
+#define UART_MNDREG      0x0034
+#define UART_IRDA        0x0038
+
+#define UART_SR          0x0008
+#define UART_SR_TX_READY       (1 << 2)
+#define UART_SR_RX_READY       (1 << 0)
+
+#define UART_RF          0x000C
+
+
+#if PLATFORM_MSM7X30
+static unsigned uart_base = MSM_UART2_BASE;
+#elif PLATFORM_MSM7X27A
+static unsigned uart_base = MSM_UART1_BASE;
+#else
+static unsigned uart_base = MSM_UART3_BASE;
+#endif
+
+#define uwr(v, a) writel(v, uart_base + (a))
+#define urd(a) readl(uart_base + (a))
+
+void uart_init(void)
+{
+       uwr(0x0A, UART_CR);  /* disable TX and RX */
+       uwr(0x30, UART_CR);  /* reset error status */
+       uwr(0x10, UART_CR);  /* reset receiver */
+       uwr(0x20, UART_CR);  /* reset transmitter */
+#if PLATFORM_QSD8K || PLATFORM_MSM7X30 || PLATFORM_MSM7X27A
+       /* TCXO */
+       uwr(0x06, UART_MREG);
+       uwr(0xF1, UART_NREG);
+       uwr(0x0F, UART_DREG);
+       uwr(0x1A, UART_MNDREG);
+#else
+       /* TCXO/4 */
+       uwr(0xC0, UART_MREG);
+       uwr(0xAF, UART_NREG);
+       uwr(0x80, UART_DREG);
+       uwr(0x19, UART_MNDREG);
+#endif
+       uwr(0x10, UART_CR);  /* reset RX */
+       uwr(0x20, UART_CR);  /* reset TX */
+       uwr(0x30, UART_CR);  /* reset error status */
+       uwr(0x40, UART_CR);  /* reset RX break */
+       uwr(0x70, UART_CR);  /* rest? */
+       uwr(0xD0, UART_CR);  /* reset */
+       uwr(0x7BF, UART_IPR); /* stale timeout = 630 * bitrate */
+       uwr(0, UART_IMR);
+       uwr(115, UART_RFWR); /* RX watermark = 58 * 2 - 1 */
+       uwr(10, UART_TFWR);  /* TX watermark */
+       uwr(0, UART_RFWR);
+       uwr(UART_CSR_115200, UART_CSR);
+       uwr(0, UART_IRDA);
+       uwr(0x1E, UART_HCR);
+       uwr(16, UART_MR1);
+       uwr(0x34, UART_MR2); /* 8N1 */
+       uwr(0x05, UART_CR); /* enable TX & RX */
+
+}
+
+static int _uart_putc(int port, char c)
+{
+       while (!(urd(UART_SR) & UART_SR_TX_READY))
+               ;
+       uwr(c, UART_TF);
+       return 0;
+}
+
+int serial_init(void)
+{
+       uart_init();
+       return 0;
+}
+
+void serial_putc(char c)
+{
+       if (c == '\n')
+               _uart_putc(0, '\r');
+       _uart_putc(0, c);
+}
+
+void serial_putc_raw(const char c)
+{
+       _uart_putc(0, c);
+}
+
+void serial_puts(const char *s)
+{
+       while (*s)
+               serial_putc(*s++);
+}
+
+int serial_getc()
+{
+       while (!(urd(UART_SR) & UART_SR_RX_READY))
+               ;
+       return urd(UART_RF);
+}
+
+int serial_tstc()
+{
+       return urd(UART_SR) & UART_SR_RX_READY;
+}
+
+void serial_setbrg()
+{
+}
+